Timing Analysis and Optimization of a High-Performance CMOS Processor Chipset. - Uwe Fassnacht; Jürgen Schietke (DATE, 1998)

Cycle time and slack optimization for VLSI-chips. - Christoph Albrecht; Bernhard Korte; Jürgen Schietke; Jens Vygen (ICCAD, 1999)

Platzierungsbasierte Logikoptimierung komplexer VLSI Chips. - Jürgen Koehl; Jürgen Schietke (MBMV, 2000)

Maximum mean weight cycle in a digraph and minimizing cycle time of a logic chip. - Christoph Albrecht; Bernhard Korte; Jürgen Schietke; Jens Vygen (Discret. Appl. Math., 2002)