A High Throughput MobileNetV2 FPGA Implementation Based on a Flexible Architecture for Depthwise Separable Convolution. - Justin Knapheide; Benno Stabernack; Maximilian Kuhnke (FPL, 2020)

Demonstration of a Distributed Accelerator Framework for Energy-efficient ML Processing. - Fritjof Steinert; Justin Knapheide; Benno Stabernack (FPL, 2021)

A YOLO v3-tiny FPGA Architecture using a Reconfigurable Hardware Accelerator for Real-time Region of Interest Detection. - Viktor Herrmann; Justin Knapheide; Fritjof Steinert; Benno Stabernack (DSD, 2022)

Demonstrating NADA: A Workflow for Distributed CNN Training on FPGA Clusters. - Justin Knapheide; Philipp Kreowsky; Benno Stabernack (FPL, 2023)

Challenges Using FPGA Clusters for Distributed CNN Training. - Philipp Kreowsky; Justin Knapheide; Benno Stabernack (FPL, 2023)

A High-Throughput, Resource-Efficient Implementation of the RoCEv2 Remote DMA Protocol and its Application. - Niklas Schelten; Fritjof Steinert; Justin Knapheide; Anton Schulte; Benno Stabernack (ACM Trans. Reconfigurable Technol. Syst., 2023)

An Approach Towards Distributed DNN Training on FPGA Clusters. - Philipp Kreowsky; Justin Knapheide; Benno Stabernack (ARCS, 2024)