Self-characterization of Combinatorial Circuit Delays in FPGAs. - Justin S. J. Wong; N. Pete Sedcole; Peter Y. K. Cheung (FPT, 2007)

Measuring and modeling FPGA clock variability. - N. Pete Sedcole; Justin S. J. Wong; Peter Y. K. Cheung (FPGA, 2008)

Combating process variation on FPGAS with a precise at-speed delay measurement method. - Justin S. J. Wong; Peter Y. K. Cheung; N. Pete Sedcole (FPL, 2008)

Modelling and compensating for clock skew variability in FPGAs. - N. Pete Sedcole; Justin S. J. Wong; Peter Y. K. Cheung (FPT, 2008)

A transition probability based delay measurement method for arbitrary circuits on FPGAs. - Justin S. J. Wong; N. Pete Sedcole; Peter Y. K. Cheung (FPT, 2008)

Characterisation of FPGA Clock Variability. - N. Pete Sedcole; Justin S. J. Wong; Peter Y. K. Cheung (ISVLSI, 2008)

Self-Measurement of Combinatorial Circuit Delays in FPGAs. - Justin S. J. Wong; N. Pete Sedcole; Peter Y. K. Cheung (ACM Trans. Reconfigurable Technol. Syst., 2009)

Degradation in FPGAs: measurement and modelling. - Edward A. Stott; Justin S. J. Wong; N. Pete Sedcole; Peter Y. K. Cheung (FPGA, 2010)

Degradation Analysis and Mitigation in FPGAs. - Edward A. Stott; Justin S. J. Wong; Peter Y. K. Cheung (FPL, 2010)

Improved delay measurement method in FPGA based on transition probability. - Justin S. J. Wong; Peter Y. K. Cheung (FPGA, 2011)

Timing speculation in FPGAs: Probabilistic inference of data dependent failure rates. - Sumanta Chaudhuri; Justin S. J. Wong; Peter Y. K. Cheung (FPT, 2011)

A two-stage variation-aware placement method for FPGAS exploiting variation maps classification. - Zhenyu Guan; Justin S. J. Wong; Sumanta Chaudhuri; George A. Constantinides; Peter Y. K. Cheung (FPL, 2012)

A variation-adaptive retiming method exploiting reconfigurability. - Zhenyu Guan; Justin S. J. Wong; Sumanta Chaudhuri; George A. Constantinides; Peter Y. K. Cheung (FPL, 2013)

Exploiting stochastic delay variability on FPGAs with adaptive partial rerouting. - Zhenyu Guan; Justin S. J. Wong; Sumanta Chaudhuri; George A. Constantinides; Peter Y. K. Cheung (FPT, 2013)

Variation and Reliability in FPGAs. - Edward A. Stott; Zhenyu Guan; Joshua M. Levine; Justin S. J. Wong; Peter Y. K. Cheung (IEEE Des. Test, 2013)

Timing Measurement Platform for Arbitrary Black-Box Circuits Based on Transition Probability. - Justin S. J. Wong; Peter Y. K. Cheung (IEEE Trans. Very Large Scale Integr. Syst., 2013)

Classification on variation maps: a new placement strategy to alleviate process variation on FPGA. - Zhenyu Guan; Justin S. J. Wong; Sumanta Chaudhuri; George A. Constantinides; Peter Y. K. Cheung (IEICE Electron. Express, 2014)

Mitigation of process variation effect in FPGAs with partial rerouting method. - Zhenyu Guan; Justin S. J. Wong; Sumanta Chaudhuri; George A. Constantinides; Peter Y. K. Cheung (IEICE Electron. Express, 2014)

Ultra-low latency continuous block-parallel stream windowing using FPGA on-chip memory. - Justin S. J. Wong; Runbin Shi; Maolin Wang 002; Hayden Kwok-Hay So (FPT, 2017)

High-Throughput Line Buffer Microarchitecture for Arbitrary Sized Streaming Image Processing. - Runbin Shi; Justin S. J. Wong; Hayden Kwok-Hay So (J. Imaging, 2019)

A Real-Time Coprime Line Scan Super-Resolution System for Ultra-Fast Microscopy. - Runbin Shi; Justin S. J. Wong; Edmund Y. Lam; Kevin K. Tsia; Hayden Kwok-Hay So (IEEE Trans. Biomed. Circuits Syst., 2019)

Low-Latency In Situ Image Analytics With FPGA-Based Quantized Convolutional Neural Network. - Maolin Wang 002; Kelvin C. M. Lee; Bob M. F. Chung; Sharatchandra Varma Bogaraju; Ho-Cheung Ng; Justin S. J. Wong; Ho Cheung Shum; Kevin K. Tsia; Hayden Kwok-Hay So (IEEE Trans. Neural Networks Learn. Syst., 2022)