A 0.2-2 GHz Time-Interleaved Multistage Switched-Capacitor Delay Element Achieving 2.55-448.6 ns Programmable Delay Range and 330 ns/mm2 Area Efficiency. - Travis Forbes; Benjamin Magstadt; Jesse Moody; Justine Saugen; Andrew Suchanek; Spencer Nelson (IEEE J. Solid State Circuits, 2023)