A fully-hardwired implementation of large vocabulary continuous speech recognizer. - Yunjoo Kim; Juyeob Kim; Joohyun Lee; Wonjong Kim (ISCE, 2015)

Hardware design exploration of fully-connected deep neural network with binary parameters. - Jinkyu Kim; Juyeob Kim; Byungjo Kim; Miyoung Lee; Joohyun Lee (ISOCC, 2016)

The Sparsity and Activation Analysis of Compressed CNN Networks in a HW CNN Accelerator Model. - Miyoung Lee; Joohyun Lee; Jinkyu Kim; Byungjo Kim; Juyeob Kim (ISOCC, 2019)

Chiplet Heterogeneous-Integration AI Processor. - Youngsu Kwon; Jinho Han; Yong Cheol Peter Cho; Juyeob Kim; Jaehoon Chung; Jaewoong Choi; Sujin Park; Igyeong Kim; Hyunjeong Kwon; Jinkyu Kim; Hyunmi Kim; Won Jeon; et al. (ICEIC, 2023)

A 6.4Gb/s/pin HBM3 Digital PHY with Low-Power, Area-Efficient Techniques for Chiplet-Based AI processors in 12-nm CMOS. - Jaewoong Choi; Yi-Gyeong Kim; Juyeob Kim; Jaehoon Chung; Young-Deuk Jeon; Min-Hyung Cho; Sujin Park; Jinho Han (A-SSCC, 2024)