Hardware accelerator for boosting convolution computation in image classification applications. - Meng-Chou Chang; Ze-Gang Pan; Jyun-Liang Chen (GCCE, 2017)

Multi-threaded System Design of A Multi-Precision Deep Learning Accelerator on FPGA with Optimized Memory Usage. - Shen-Fu Hsiao; Jyun-Liang Chen; Yi Hsu; Xiang-Ting Huang (ICCE-TW, 2021)