A logic network synthesis system, SYLON. - S. Muroga; X. Q. Xiang; J. Limqueco; L. P. Lin; K. C. Chen (ICCD, 1989)

Editorial. - Wern-Ho Sheen; K. C. Chen; Fumiyuki Adachi (Wirel. Pers. Commun., 2001)

Energy efficiency vs. programmability trade-off: architectures and design principles. - Pablo Robelly; Hendrik Seidel; K. C. Chen; Gerhard P. Fettweis (DATE, 2006)

Session MP4b: Machine-to-machine communications and networks (invited). - K. C. Chen (ACSCC, 2012)

A Hybrid Methodology for Multi-Echelon Supply Chain Network Planning with Production Loss. - Z. H. Che 001; K. C. Chen; Y. L. Huang; Y. G. Liu; S. H. Yeh (IIAI-AAI, 2016)

Chip-level characterization and RTN-induced error mitigation beyond 20nm floating gate flash memory. - T. W. Lin; S. H. Ku; C. H. Cheng; C. W. Lee; Ijen Huang; Wen-Jer Tsai; T. C. Lu; W. P. Lu; K. C. Chen; Tahui Wang; Chih-Yuan Lu (IRPS, 2018)

Investigation of data pattern effects on nitride charge lateral migration in a charge trap flash memory by using a random telegraph signal method. - Y. H. Liu; H. Y. Lin; C. M. Jiang; Tahui Wang; W. J. Tsai; T. C. Lu; K. C. Chen; Chih-Yuan Lu (IRPS, 2018)

A Novel Data Recovery Technique for 3D TLC NAND Flash Memory Using Intercell Program. - Y. L. Chou; W. J. Tsai; G. W. Wu; W. Chang; T. C. Lu; K. C. Chen; C. Y. Lu (IRPS, 2023)