Reconfigurable wrapper architecture for UART CORE testing using FSM approach. - K. Chakrapani; P. Neelamegam (Int. J. Adv. Intell. Paradigms, 2015)

Test data compression using Lingering Component Reduction technique for system-on-a-chip applications. - K. Chakrapani; Rajappa Muthaiah (Comput. Electr. Eng., 2018)