Design of Novel SRAM Cell Using Hybrid VLSI Techniques for Low Leakage and High Speed in Embedded Memories. - K. Gavaskar; U. S. Ragupathy 001; V. Malini (Wirel. Pers. Commun., 2019)

Proposed Design of 1 KB Memory Array Structure for Cache Memories. - K. Gavaskar; U. S. Ragupathy 001; V. Malini (Wirel. Pers. Commun., 2019)

Design and comparative analysis of SRAM array using low leakage controlled transistor technique with improved delay. - K. Gavaskar; M. Sankara Narayanan; M. Sreenidhi Nachammal; K. Vignesh (J. Ambient Intell. Humaniz. Comput., 2022)

Low Power CMOS Design of Phase Locked Loop for Fastest Frequency Acquisition at Various Nanometer Technologies. - K. Gavaskar; R. Dhivya; R. Dimple Dayana (Wirel. Pers. Commun., 2022)

A Fresh Design of Power Effective Adapted Vedic Multiplier for Modern Digital Signal Processors. - K. Gavaskar; D. Malathi; G. Ravivarma; V. Krithika Devi; M. Megala; S. Megaraj Begam (Wirel. Pers. Commun., 2022)

A Variant of Long Multiplication Design with Low Power and Area Using Modified 7: 3 Compressor for Biomedical Applications. - K. Gavaskar; D. Malathi; G. Ravivarma; V. Krithika Devi; M. Megala; S. Megaraj Begam (Wirel. Pers. Commun., 2022)

Design of Low Power Multiplier with Less Area Using Quaternary Carry Increment Adder for New-Fangled Processors. - K. Gavaskar; D. Malathi; G. Ravivarma; P. S. Priyatharshan; S. Rajeshwari; B. Sanjay (Wirel. Pers. Commun., 2023)

Low-Power SRAM Cell and Array Structure in Aerospace Applications: Single-Event Upset Impact Analysis. - K. Gavaskar; P. Sivaranjani; S. Elango; G. Nirmal Raja (Wirel. Pers. Commun., 2023)

New approach for improving the performance of dual axis solar tracker with auto cleaning system. - K. Gavaskar; U. S. Ragupathy 001 (Soft Comput., 2023)

A Comprehensive Survey on Detection of Ocular and Non-Ocular Diseases Using Color Fundus Images. - Megha Gupta; Sneha Gupta; Gopinath Palanisamy; J. S. Nisha; Veerapu Goutham; S. Arun Kumar; K. Gavaskar; Ganesh R. Naik (IEEE Access, 2024)