Design of Low Area and Low Power Systolic Serial Parallel Multiplier using CNTFETs. - K. B. Dheeraj Kumar; K. Lakshmi BhanuPrakash Reddy; Vikramkumar Pudi; Srinivasu Bodapati (iSES, 2021)

Design of Energy-Efficient TSPC based D Flip-flop for CNTFET Technology. - K. Lakshmi BhanuPrakash Reddy; K. B. Dheeraj Kumar; Vikramkumar Pudi (VDAT, 2021)

Design of Energy Efficient and Low Delay Posit Multiplier. - K. Lakshmi BhanuPrakash Reddy; Haripriya R. S; Keerthija Puli; Subba Ramkumar Reddy Annapalli; Vikramkumar Pudi (VLSID, 2023)

Image Compression Based on Near Lossless Predictive Measurement Coding for Block-Based Compressive Sensing. - K. Lakshmi BhanuPrakash Reddy; Vikramkumar Pudi; Balasubramanyam Appina; Anupam Chattopadhyay (IEEE Trans. Circuits Syst. II Express Briefs, 2024)