Force Rebalance with Multi-bit Sigma-Delta implemented with FPGA for Precision Rate Sensor. - George P. Rajesh; C. K. Deepthy; M. Mary Jermila; K. P. Raghunath; Vishnu N. Aparna (TENCON, 2019)

ASIC Based LVDT Signal Conditioner for High-Accuracy Measurements. - K. P. Raghunath; K. V. Manu Sagar; T. Gokulan; Kundan Kumar; Chetan Singh Thakur (VDAT, 2019)