Mridangam Simulation. - Mohan Harihara; K. Radhakrishna Rao (ICMC, 1986)

A novel technique for the on-chip tuning of monolithic filters. - K. Radhakrishna Rao; G. Venugopal (Proc. IEEE, 1987)

Magnitude locked loop. - K. Radhakrishna Rao; Pranav Ashar (Proc. IEEE, 1988)

A 20MHz CMOS Variable Gain Amplifier. - C. Srinivasan; K. Radhakrishna Rao (VLSI Design, 1996)

Tuning Schemes for Transmission Zeros of Continuous-Time Filters. - K. Ravi Shankar; K. Radhakrishna Rao; Srinivasan Venkatraman (VLSI Design, 1997)

A Novel Translinear Principle Based BiMOS Transconductor. - S. Pradeep Kiran; K. Radhakrishna Rao (VLSI Design, 1998)

A Low Power Video Frequency Continuous Time Filter. - Srinivasan Venkatraman; Srikanth Natarajan; K. Radhakrishna Rao (VLSI Design, 1998)

A New Tuning Scheme for Continuous Time Filters. - Srinivasan Venkatraman; Srikanth Natarajan; K. Radhakrishna Rao (VLSI Design, 1998)

A low-voltage low power square-root domain filter. - J. Veerendra Kumar; K. Radhakrishna Rao (APCCAS (2), 2002)

A Low-Voltage Low Power CMOS Companding Filter. - J. Veerendra Kumar; K. Radhakrishna Rao (VLSI Design, 2003)

Narrow Band Noise Suppression Scheme for improving Signal to Noise Ratio. - Anantha Nag; K. Radhakrishna Rao (VLSI Design, 2003)

Low Voltage Analogue Multiplier. - Saurabh Singh; K. Radhakrishna Rao (APCCAS, 2006)