Some Experience with the Use of Formal Specifications. - Gregor von Bochmann; Eduard Cerny; Michel Gagné; Claude Jard; Alain Léveillé; Clement Lacaille; Michel Maksud; K. S. Raghunathan; Behçet Sarikaya (PSTV, 1982)

Experience with Formal Specifications Using an Extended State Transition Model. - Gregor von Bochmann; Eduard Cerny; Michel Gagné; Claude Jard; Alain Léveillé; Clement Lacaille; Michel Maksud; K. S. Raghunathan; Behçet Sarikaya (IEEE Trans. Commun., 1982)

Relationship between performance parameters for transport and network services. - K. S. Raghunathan; J. A. Barchanski; Gregor von Bochmann (SIGCOMM, 1983)

N2S: An Automatic Netlist to Schematic generator. - B. Naveen; A. Savargaonkar; K. S. Raghunathan (VLSI Design, 1992)

Constrained Via Minimisation In Greedy Channel Routing. - K. R. Rao; K. S. Raghunathan (VLSI Design, 1992)

FLOR: A Hierarchical Floorplanner Under Vinyas VCX System - System Overview. - Suhail Ahmed; T. V. Nagesh; Ramoji Rao; B. Naveen; P. K. Fangaria; K. S. Raghunathan (VLSI Design, 1993)

BEST: Bond Editor and Test Vector Translator. - P. Marimuthu; K. S. Raghunathan (VLSI Design, 1993)

An Automatic Netlist-to-Schematic Generator. - B. Naveen; K. S. Raghunathan (IEEE Des. Test Comput., 1993)