New built-in self-test technique based on addition/subtraction of selected node voltages. - K. Y. Ko; Mike W. T. Wong (Asian Test Symposium, 2000)

Testing System-On-Chip by Summations of Cores? Test Output Voltages. - K. Y. Ko; Mike W. T. Wong; Yim-Shu Lee (Asian Test Symposium, 2002)

Analog and Mixed-Signal IP Cores Testing. - Mike W. T. Wong; K. Y. Ko; Yim-Shu Lee (DELTA, 2002)