Right-half-plane zero removal technique for low-voltage low-power nested Miller compensation CMOS amplifier. - Ka Nang Leung; Philip K. T. Mok; Wing-Hung Ki (ICECS, 1999)

Optimum nested Miller compensation for low-voltage low-power CMOS amplifier design. - Ka Nang Leung; Philip K. T. Mok; Wing-Hung Ki (ISCAS (2), 1999)

A novel frequency compensation technique for low-voltage low-dropout regulator. - Ka Nang Leung; Philip K. T. Mok; Wing-Hung Ki (ISCAS (5), 1999)

Analysis on an alternative structure of damping-factor-control frequency compensation. - Ka Nang Leung; Philip K. T. Mok; Wing-Hung Ki; Johnny K. O. Sin (ISCAS, 2000)

Three-stage large capacitive load amplifier with damping-factor-control frequency compensation. - Ka Nang Leung; Philip K. T. Mok; Wing-Hung Ki; Johnny K. O. Sin (IEEE J. Solid State Circuits, 2000)

A 2-V 23-μA 5.3-ppm/°C 4th-order curvature-compensated CMOS bandgap reference. - Ka Nang Leung; Philip K. T. Mok; Chi Yat Leung (CICC, 2002)

A sub-1-V 15-ppm/°C CMOS bandgap voltage reference without requiring low threshold voltage device. - Ka Nang Leung; Philip K. T. Mok (IEEE J. Solid State Circuits, 2002)

A dual-path bandwidth extension amplifier topology with dual-loop parallel compensation. - Hoi Lee; Ka Nang Leung; Philip K. T. Mok (IEEE J. Solid State Circuits, 2003)

A CMOS voltage reference based on weighted ΔVGS for CMOS low-dropout linear regulators. - Ka Nang Leung; Philip K. T. Mok (IEEE J. Solid State Circuits, 2003)

A capacitor-free CMOS low-dropout regulator with damping-factor-control frequency compensation. - Ka Nang Leung; Philip K. T. Mok (IEEE J. Solid State Circuits, 2003)

A 2-V 23-μA 5.3-ppm/°C curvature-compensated CMOS bandgap voltage reference. - Ka Nang Leung; Philip K. T. Mok; Chi Yat Leung (IEEE J. Solid State Circuits, 2003)

Design considerations of recent advanced low-voltage low-temperature-coefficient CMOS bandgap voltage reference. - Philip K. T. Mok; Ka Nang Leung (CICC, 2004)

Design of a 1.5-V high-order curvature-compensated CMOS bandgap reference. - Chi Yat Leung; Ka Nang Leung; Philip K. T. Mok (ISCAS (1), 2004)

A 1.2V buck converter with a novel on-chip low-voltage current-sensing scheme. - Chi Yat Leung; Philip K. T. Mok; Ka Nang Leung (ISCAS (5), 2004)

A low-voltage CMOS low-dropout regulator with enhanced loop response. - Ka Nang Leung; Philip K. T. Mok; Sai Kit Lau (ISCAS (1), 2004)

A 1-V integrated current-mode boost converter in standard 3.3/5-V CMOS technologies. - Chi Yat Leung; Philip K. T. Mok; Ka Nang Leung (IEEE J. Solid State Circuits, 2005)

Design of low-power analog drivers based on slew-rate enhancement circuits for CMOS low-dropout regulators. - Hoi Lee; Philip K. T. Mok; Ka Nang Leung (IEEE Trans. Circuits Syst. II Express Briefs, 2005)

An integrated CMOS current-sensing circuit for low-Voltage current-mode buck regulator. - Chi Yat Leung; Philip K. T. Mok; Ka Nang Leung; Mansun Chan (IEEE Trans. Circuits Syst. II Express Briefs, 2005)

A voltage-mode PWM buck regulator with end-point prediction. - Man Siu; Philip K. T. Mok; Ka Nang Leung; Yat-Hei Lam; Wing-Hung Ki (IEEE Trans. Circuits Syst. II Express Briefs, 2006)

A Low-Dropout Regulator for SoC With Q-Reduction. - Sai Kit Lau; Philip K. T. Mok; Ka Nang Leung (IEEE J. Solid State Circuits, 2007)

Enhanced channel selection using digital low-IF in Weaver receiver architecture. - Misteltein Pak-Kee Chan; Oliver Chiu-sing Choy; Kong-Pang Pun; Cheong-Fat Chan; Alex Ka Nang Leung (APCCAS, 2008)

Design of passive UHF RFID tag in 130nm CMOS technology. - Yang Hong; Chi Fat Chan; Jianping Guo; Yuen Sum Ng; Weiwei Shi 001; Lincoln Lai Kan Leung; Ka Nang Leung; Chiu-sing Choy; Kong-Pang Pun (APCCAS, 2008)

Design of a Low-Voltage CMOS Charge Pump. - Chun Yu Cheng; Ka Nang Leung; Yi Ki Sun; Pui Ying Or (DELTA, 2008)

Compensation-Capacitor Free Pseudo Three-Stage Amplifier with Large Capacitive Loads. - Ka Nang Leung; Yanqi Zheng (DELTA, 2008)

A Low-Power CMOS Front-End for Photoplethysmographic Signal Acquisition With Robust DC Photocurrent Rejection. - Alex K. Y. Wong; Kong-Pang Pun; Yuan-Ting Zhang; Ka Nang Leung (IEEE Trans. Biomed. Circuits Syst., 2008)

Development of Single-Transistor-Control LDO Based on Flipped Voltage Follower for SoC. - Tsz Yin Man; Ka Nang Leung; Chi Yat Leung; Philip K. T. Mok; Mansun Chan (IEEE Trans. Circuits Syst. I Regul. Pap., 2008)

A Fully Differential Band-Selective Low-Noise Amplifier for MB-OFDM UWB Receivers. - Siu-Kei Tang; Kong-Pang Pun; Oliver Chiu-sing Choy; Cheong-Fat Chan; Ka Nang Leung (IEEE Trans. Circuits Syst. II Express Briefs, 2008)

A Low-power Signal Processing Front-end and Decoder for UHF Passive RFID Transponders. - Chi Fat Chan; Weiwei Shi 001; Kong-Pang Pun; Lincoln Lai Kan Leung; Ka Nang Leung; Oliver Chiu-sing Choy (ISCAS, 2009)

Robust and Low Complexity Packet Detector Design for MB-OFDM UWB. - Wen Fan; Oliver Chiu-sing Choy; Ka Nang Leung (ISCAS, 2009)

A Fold-back Current-limit Circuit with Load-insensitive Quiescent Current for CMOS Low Dropout Regulator. - Jianping Guo; Ka Nang Leung (ISCAS, 2009)

A Single-inductor Dual-output Pseudo-DCM/CCM Buck and Boost Converter with Adaptive DC Current Compensation. - Jingbin Jia; Ka Nang Leung (ISCAS, 2009)

A 1.9 µW Transient-Enhanced Low-Dropout Regulator with Voltage-Spike Suppression. - Ka Nang Leung; Felix Kok Man Cheung; Marco Ho; Hiu Ching Poon; Pui Ying Or (J. Low Power Electron., 2010)

RF Module Design of Passive UHF RFID Tag Implemented in CMOS 90-nm Technology. - Ka Nang Leung; Chiu-sing Choy; Kong-Pang Pun; Lincoln Lai Kan Leung; Jianping Guo; Yuen Sum Ng; Chi Fat Chan; Weiwei Shi 001; Yang Hong; Marco Ho; Ki-Leung Mak; Yanqing Ai (J. Low Power Electron., 2010)

A Low-Power Continuously-Calibrated Clock Recovery Circuit for UHF RFID EPC Class-1 Generation-2 Transponders. - Chi Fat Chan; Kong-Pang Pun; Ka Nang Leung; Jianping Guo; Lincoln Lai Kan Leung; Oliver Chiu-sing Choy (IEEE J. Solid State Circuits, 2010)

A 6- μ W Chip-Area-Efficient Output-Capacitorless LDO in 90-nm CMOS Technology. - Jianping Guo; Ka Nang Leung (IEEE J. Solid State Circuits, 2010)

A Low-Power Fast-Transient 90-nm Low-Dropout Regulator With Multiple Small-Gain Stages. - Marco Ho; Ka Nang Leung; Ki-Leung Mak (IEEE J. Solid State Circuits, 2010)

An Output-Capacitorless Low-Dropout Regulator With Direct Voltage-Spike Detection. - Pui Ying Or; Ka Nang Leung (IEEE J. Solid State Circuits, 2010)

A CMOS Low-Dropout Regulator With a Momentarily Current-Boosting Voltage Buffer. - Ka Nang Leung; Yuen Sum Ng (IEEE Trans. Circuits Syst. I Regul. Pap., 2010)

A Fast-Transient Low-Dropout Regulator With Load-Tracking Impedance Adjustment and Loop-Gain Boosting Technique. - Pui Ying Or; Ka Nang Leung (IEEE Trans. Circuits Syst. II Express Briefs, 2010)

A 0.5-Hz High-Pass Cutoff Dual-Loop Transimpedance Amplifier for Wearable NIR Sensing Device. - Alex K. Y. Wong; Ka Nang Leung; Kong-Pang Pun; Yuan-Ting Zhang (IEEE Trans. Circuits Syst. II Express Briefs, 2010)

A Chip-Area Efficient Voltage Regulator for VLSI Systems. - Ka Nang Leung; Yuan Yen Mai; Philip K. T. Mok (IEEE Trans. Very Large Scale Integr. Syst., 2010)

Development of energy-efficient fast-transient CMOS low-dropout regulators for SoC applications. - Ka Nang Leung; Marco Ho; Jianping Guo; Pui Ying Or (ISCAS, 2011)

Dynamic Bias-Current Boosting Technique for Ultralow-Power Low-Dropout Regulator in Biomedical Applications. - Marco Ho; Ka Nang Leung (IEEE Trans. Circuits Syst. II Express Briefs, 2011)

A low-power MICS fractional-N frequency synthesizer for implantable biomedical systems. - Kwan Wai Li; Ka Nang Leung (APCCAS, 2012)

A CMOS voltage regulator for passive RFID tag ICs. - Jianping Guo; Ka Nang Leung (Int. J. Circuit Theory Appl., 2012)

Improved active-diode circuit used in voltage doubler. - Jingbin Jia; Ka Nang Leung (Int. J. Circuit Theory Appl., 2012)

A Fast-Response Pseudo-PWM Buck Converter With PLL-Based Hysteresis Control. - Yanqi Zheng; Hua Chen; Ka Nang Leung (IEEE Trans. Very Large Scale Integr. Syst., 2012)

A transient-improved low-dropout regulator with nested flipped voltage follower structure. - Hua Chen; Ka Nang Leung (Int. J. Circuit Theory Appl., 2013)

Sub-mW $LC$ Dual-Input Injection-Locked Oscillator for Autonomous WBSNs. - Kwan Wai Li; Ka Nang Leung; Lincoln Lai Kan Leung (IEEE Trans. Very Large Scale Integr. Syst., 2013)

Load regulation cancellation based on adaptive body bias for STC-LDOs. - Shi Bu; Marco Ho; Ka Nang Leung; Jianping Guo (APCCAS, 2014)

A 124-dB double-gain-boosted cascode amplifier with 92% rail-to-rail output swing. - Marco Ho; Shi Bu; Yanqi Zheng; Ka Nang Leung; Jianping Guo (APCCAS, 2014)

Analysis of CMOS low-dropout regulator - Power-supply rejection ratio. - Marco Ho; Ka Nang Leung; Pui Ying Or; Jianping Guo (APCCAS, 2014)

A Signal- and Transient-Current Boosting Amplifier for Large Capacitive Load Applications. - Kai Ho Mak; Ka Nang Leung (IEEE Trans. Circuits Syst. I Regul. Pap., 2014)

An Area-Efficient 96.5%-Peak-Efficiency Cross-Coupled Voltage Doubler With Minimum Supply of 0.8 V. - Tin Wai Mui; Marco Ho; Kai Ho Mak; Jianping Guo; Hua Chen; Ka Nang Leung (IEEE Trans. Circuits Syst. II Express Briefs, 2014)

Gain and slew rate enhancement for amplifiers through current starving and feeding. - Shi Bu; Hing Wa Tse; Ka Nang Leung; Jianping Guo; Marco Ho (ISCAS, 2015)

Design considerations of STCB OTA in CMOS 65nm with large capacitive loads. - Kai Ho Mak; Marco Ho; Ka Nang Leung; Wang Ling Goh (ISCAS, 2015)

A fixed-frequency auto-buck-boost SIMO DC-DC converter with duty-cycle redistribution and duty-predicted current control. - Yanqi Zheng; Marco Ho; Ka Nang Leung; Jianping Guo (ISCAS, 2015)

A robust cross-regulation-suppressed single-inductor multiple-output dc-dc converter with duty-regulated comparator control. - Yanqi Zheng; Marco Ho; Ka Nang Leung; Jianping Guo; Hua Chen (MWSCAS, 2015)

A digital-control sensorless current-mode boost converter with non-zero error bin compensation and seamless mode transition. - Yanqi Zheng; Marco Ho; Ka Nang Leung; Jianping Guo; Biao Chen (SoCC, 2015)

A 0.7V 24µA Hybrid OTA Driving 15 nF Capacitive Load With 1.46 MHz GBW. - Kai Ho Mak; Ming Wai Lau; Jianping Guo; Tin Wai Mui; Marco Ho; Wang Ling Goh; Ka Nang Leung (IEEE J. Solid State Circuits, 2015)

A 5.4-mW 180-cm Transmission Distance 2.5-Mb/s Advanced Techniques-Based Novel Intrabody Communication Receiver Analog Front End. - Hao Wang 030; Xian Tang; Chiu-sing Choy; Ka Nang Leung; Kong-Pang Pun (IEEE Trans. Very Large Scale Integr. Syst., 2015)

A Shared-MSB delay-line-based ADC with simultaneous quantization for digital control single-inductor-multiple-output DC-DC converter. - Biao Chen; Lei Zhu; Yanqi Zheng; Jianping Guo; Marco Ho; Ka Nang Leung; Dihu Chen; Yang Liu (ISIC, 2016)

A regulated voltage multiplier for passive RFID Tag. - Jingbin Jia; Marco Ho; Ka Nang Leung; Jianping Guo (ISIC, 2016)

A fast-response buck-boost DC-DC converter with constructed full-wave current sensor. - Lei Zhu; Biao Chen; Yanqi Zheng; Jianping Guo; Marco Ho; Ka Nang Leung; Dihu Chen; Yang Liu (ISIC, 2016)

Digitally-assisted constant-on-time dynamic-biasing technique for bandwidth and slew-rate enhancement in ultra-low-power low-dropout regulator. - Jianping Guo; Marco Ho; Ka Nang Leung; Guangxiang Li (Int. J. Circuit Theory Appl., 2016)

A Two-Stage Large-Capacitive-Load Amplifier With Multiple Cross-Coupled Small-Gain Stages. - Marco Ho; Jianping Guo; Tin Wai Mui; Kai Ho Mak; Wang Ling Goh; Hiu Ching Poon; Shi Bu; Ming Wai Lau; Ka Nang Leung (IEEE Trans. Very Large Scale Integr. Syst., 2016)

Enhanced active-feedback frequency compensation with on-chip-capacitor reduction feature for amplifiers with large capacitive load. - Ming Wai Lau; Kai Ho Mak; Ka Nang Leung; Jianping Guo; Wang Ling Goh (Int. J. Circuit Theory Appl., 2017)

A 3.3-MHz fast-response load-dependent-on/off-time buck-boost DC-DC converter with low-noise hybrid full-wave current sensor. - Zhao Wang; Biao Chen; Lei Zhu; Yanqi Zheng; Jianping Guo; Dihu Chen; Marco Ho; Ka Nang Leung (Microelectron. J., 2018)

A Fully Integrated Low-Dropout Regulator With Differentiator-Based Active Zero Compensation. - Shi Bu; Ka Nang Leung; Yan Lu 002; Jianping Guo; Yanqi Zheng (IEEE Trans. Circuits Syst. I Regul. Pap., 2018)

Low-dropout regulator with dual cross-coupled current mirrors. - Yuet Ho Woo; Ka Nang Leung; Yanqi Zheng; Jianping Guo (Int. J. Circuit Theory Appl., 2019)

An Output-Capacitorless Low-Dropout Regulator with High Slew Rate and Unity-Gain Bandwidth. - Yong Zhou; Yanqi Zheng; Ka Nang Leung (ISCAS, 2020)

A 40nm CMOS Hysteretic Buck DC-DC Converter With Digital-Controlled Power-Driving-Tracked-Duration Current Pump. - Xiangbin Ding; Pak Kwong Chan; Ka Nang Leung (IEEE Access, 2020)

Adaptive-biased sense-FET-based inductor-current sensor for 10-MHz buck converter. - Yong Zhou; Xiaohui Lin 009; Jianxin Yang; Yanqi Zheng; Ka Nang Leung (Int. J. Circuit Theory Appl., 2020)

Bandwidth and Slew Rate Enhanced OTA With Sustainable Dynamic Bias. - Cheuk Ho Hung; Yanqi Zheng; Jianping Guo; Ka Nang Leung (IEEE Trans. Circuits Syst. II Express Briefs, 2020)

A dual-power-path charge pump for solar-energy harvesting. - Tin Wai Mui; Jianxin Yang; Yajun Lin; Yong Zhou; Yanqi Zheng; Jianping Guo; Ka Nang Leung (Int. J. Circuit Theory Appl., 2021)

An Ultra-Low-Supply Output-Capacitorless LDO with Signal- and Transient-Enhancement. - Yajun Lin; Haozheng Wan; Jianxin Yang; Ka Nang Leung (APCCAS, 2022)

A Hybrid Low-Dropout Regulator With Load Regulation Correction. - Yuet Ho Woo; Jianxin Yang; Jianping Guo; Yanqi Zheng; Ka Nang Leung (IEEE Access, 2022)

An Analog-Assisted Digital LDO With Dynamic-Biasing Asynchronous Comparator. - Yuet Ho Woo; Jianxin Yang; Junwen Li; Jianping Guo; Yanqi Zheng; Ka Nang Leung (IEEE Access, 2022)

A Triple-Mode DC-DC Converter With Wide Input and Load Ranges for Energy Harvesting in IoT Edge Nodes. - Jianxin Yang; Bin Li 007; Ka Nang Leung; Zhijian Chen; Yanqi Zheng (IEEE Trans. Circuits Syst. II Express Briefs, 2022)

Full-Wave Sense-FET-Based Inductor-Current Sensor With Wide Dynamic Range for Buck Converters. - Yong Zhou; Qingqing Cheng; Junwen Li; Yanqi Zheng; Ka Nang Leung (IEEE Trans. Circuits Syst. II Express Briefs, 2022)

A Decentralized Control Scheme for Active Power Filter Parallel System. - Chao Gao; Shan He; Pooya Davari; Frede Blaabjerg; Ka Nang Leung; Poh Chiang Loh (IECON, 2023)

A 4-Phase Integrated Voltage Regulator with In-Package Inductors Achieving 89.0% Peak Efficiency and 65% Droop Improvement for 6A/2ns Transient. - Kai Yuan; Chenzhou Ding; Junmin Jiang; Tiantian Tang; Junyi Ruan; Yelei Xie; Faen Liu; Shuguo Jiang; Tao Liu; Ka Nang Leung; Xun Liu (A-SSCC, 2024)

A Li-ion-Battery-Input 1-to-6V-Output Bootstrap-Free Hybrid Buck-or-Boost Converter Without RHP Zero Achieving 97.3% Peak Efficiency 6μs Recovery Time and 1.13μs/V DVS Rate. - Junyi Ruan; Junmin Jiang; Chenzhou Ding; Kai Yuan; Ka Nang Leung; Xun Liu (ISSCC, 2024)

A 2.8 μs Response Time 95.1% Efficiency Hybrid Boost Converter With RHP Zero Elimination for Fast-Transient Applications. - Junyi Ruan; Junmin Jiang; Chenzhou Ding; Yunxiao Li; Yanhui Wu; Ka Nang Leung; Xun Liu (IEEE J. Solid State Circuits, 2024)

An Adaptive Zero-Current Detector for Single-Inductor Multiple-Output DC-DC Converter With Full-Wave Current Sensor. - Yichen Zhang; Chaowei Tang; Yanqi Zheng; Xian Tang; Ka Nang Leung (IEEE Trans. Very Large Scale Integr. Syst., 2024)

Analysis and Modeling of Hybrid Boost Converter With Always Reduced Inductor Current and Continuous Output-Current Delivery. - Yinglyu Xiong; Zehao Tao; Miaomiao Chen; Xun Liu; Ka Nang Leung (ISCAS, 2025)

Passivity-Based Controller Design of LCL-Filtered Selective-Harmonic Resistive-Active Power Filter. - Chao Gao; Shan He; Rui Kong; Ka Nang Leung; Poh Chiang Loh (IEEE Trans. Ind. Electron., 2025)

A High-Current-Efficiency Digital-Assisted Analog LDO With Dual-Biasing Mode for Near-Threshold Regulation. - Yajun Lin; Hing Tai Chen; Xun Liu; Ka Nang Leung (IEEE J. Solid State Circuits, 2025)