A new CMOS image sensor readout structure for 3D integrated imagers. - Shang-Fu Yeh; Jin-Yi Lin; Chih-Cheng Hsieh; Ka-Yi Yeh; Chung-Chi Jim Li (CICC, 2011)

Developing through-silicon stacking process using 3-D CMOS imager as a test vehicle. - Ding-Ming Kwai; Ka-Yi Yeh (ISOCC, 2011)

A 3 Megapixel 100 Fps 2.8 µm Pixel Pitch CMOS Image Sensor Layer With Built-in Self-Test for 3D Integrated Imagers. - Shang-Fu Yeh; Chih-Cheng Hsieh; Ka-Yi Yeh (IEEE J. Solid State Circuits, 2013)

Contactless Stacked-die Testing for Pre-bond Interposers. - Jui-Hung Chien; Ruei-Siang Hsu; Hsueh-Ju Lin; Ka-Yi Yeh; Shih-Chieh Chang (DAC, 2014)

Compiler of Reed-Solomon Codec for 400-Gb/s IEEE 802.3bs Standard. - Lin Liu; Lai Chi; Shi-Yu Huang; Ka-Yi Yeh (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)