Comments, with reply, on 'Characterization and modeling of mismatch in MOS transistors for precision analog design'. - Cormac S. G. Conroy; William A. Lane; Michael A. Moran; Kadaba R. Lakshmikumar; Miles A. Copeland; Robert A. Hadaway (IEEE J. Solid State Circuits, 1988)

A 12-bit 1-Msample/s capacitor error-averaging pipelined A/D converter. - Bang-Sup Song; Michael F. Tompsett; Kadaba R. Lakshmikumar (IEEE J. Solid State Circuits, 1988)

A baseband codec for digital cellular telephony. - Kadaba R. Lakshmikumar; David W. Green; Krishnaswamy Nagaraj; King-Hon Lau; Oscar E. Agazzi; Jeffrey R. Barner; Reza S. Shariatdoust; Gene A. Wilson; Tuan N. Le; M. R. Dwarakanath; Jacques G. Ruch; Jit Kumar; et al. (IEEE J. Solid State Circuits, 1991)

A baseband processor for IS-54 cellular telephony. - Vladimir Friedman; Kadaba R. Lakshmikumar; David L. Price; Tuan N. Le; Jit Kumar (IEEE J. Solid State Circuits, 1996)

A low-voltage line driver for digital signaling interface. - K. R. Lakshmikumar; J. Anidjar (IEEE J. Solid State Circuits, 1999)

A CMOS self-calibrating frequency synthesizer. - William B. Wilson; Un-Ku Moon; Kadaba R. Lakshmikumar; Liang Dai (IEEE J. Solid State Circuits, 2000)

High-speed serial transceivers for data communication systems. - John M. Khoury; Kadaba R. Lakshmikumar (IEEE Commun. Mag., 2001)

A fully-integrated 10.5 to 13.5 Gbps transceiver in 0.13 μm CMOS. - G. Miao; P. Ju; D. Ng; John M. Khoury; Kadaba Lakshmikumar (CICC, 2003)

A low-power 0.13μm CMOS OC-48 SONET and XAUI compliant SERDES. - R. Wadhwa; A. Aggarwal; J. Edwards; M. Ehlert; J. Hoehn; G. Miao; Kadaba Lakshmikumar; John M. Khoury (CICC, 2003)

A Process and Temperature Compensated Two-Stage Ring Oscillator. - Kadaba Lakshmikumar; Vinod Mukundagiri; Sander Laurentius Johannes Gierkink (CICC, 2007)

A 3-level PWM ADSL2+ CO line driver. - Sander Gierkink; Kadaba Lakshmikumar; Vinod Mukundagiri; Drahoslav Lím; Arnold Muralt; Fred Larsen (CICC, 2009)

Analog PLL Design With Ring Oscillators at Low-Gigahertz Frequencies in Nanometer CMOS: Challenges and Solutions. - Kadaba Lakshmikumar (IEEE Trans. Circuits Syst. II Express Briefs, 2009)

Patent Abstracts. - K. R. Lakshmikumar (IEEE J. Solid State Circuits, 2016)

A process and temperature insensitive CMOS linear TIA for 100 Gbps/λ PAM-4 optical links. - Kadaba Lakshmikumar; Alexander Kurylak; Manohar Nagaraju; Richard Booth 004; Joe Pampanin (CICC, 2018)

A Process and Temperature Insensitive CMOS Linear TIA for 100 Gb/s/λ PAM-4 Optical Links. - Kadaba Lakshmikumar; Alexander Kurylak; Manohar Nagaraju; Richard Booth 004; Romesh Kumar Nandwana; Joe Pampanin; Vito Boccuzzi (IEEE J. Solid State Circuits, 2019)

A 16-Gb/s -11.6-dBm OMA Sensitivity 0.7-pJ/bit Optical Receiver in 65-nm CMOS Enabled by Duobinary Sampling. - Mostafa Gamal Ahmed; Dongwook Kim; Romesh Kumar Nandwana; Ahmed Elkholy; Kadaba R. Lakshmikumar; Pavan Kumar Hanumolu (IEEE J. Solid State Circuits, 2021)

High-Performance CMOS TIA for Data Center Optical Interconnects. - Kadaba R. Lakshmikumar; Alexander Kurylak; Romesh Kumar Nandwana; Bibhu Das; Joe Pampanin; Vito Boccuzzi; Pavan Kumar Hanumolu (BCICTS, 2022)

An Interference Suppression Technique for Millimeter-Wave LC VCOs Using a Multiport Coupled Inductor. - Abhishek Bhat; Romesh Kumar Nandwana; Kadaba Lakshmikumar (IEEE Trans. Circuits Syst. II Express Briefs, 2022)

A 7 pA/$ surd text{Hz}$ Asymmetric Differential TIA for 100Gb/s PAM-4 links with -14dBm Optical Sensitivity in 16nm CMOS. - Kadaba Lakshmikumar; Alexander Kurylak; Romesh Kumar Nandwana; Bibhu Das; Joe Pampanin; Mike Brubaker; Pavan Kumar Hanumolu (ISSCC, 2023)

Optical Interconnects Using Hybrid Integration of CMOS and Silicon-Photonic ICs. - Vishal Saxena; Ankur Kumar; Shubham Mishra; Samuel Palermo; Kadaba R. Lakshmikumar (IEEE Trans. Circuits Syst. II Express Briefs, 2024)