Flexible environment and creativity: a preliminary case study of interdisciplinary student design teams. - Kahyun Kim (Creativity & Cognition, 2009)

An Interdisciplinary Undergraduate Design Course for Wearable and Pervasive Computing Products. - Tom L. Martin; Kahyun Kim; Jason B. Forsyth; Lisa D. McNair; Eloise Coupey; Ed Dorsa (ISWC, 2011)

Discipline-based instruction to promote interdisciplinary design of wearable and pervasive computing products. - Tom L. Martin; Kahyun Kim; Jason B. Forsyth; Lisa D. McNair; Eloise Coupey; Ed Dorsa (Pers. Ubiquitous Comput., 2013)

A 5GHz All-Digital PLL with shunt regulating Ring DCO in BOST for DDR5 ATE. - Kyungmin Baek; Kahyun Kim; Deog-Kyoon Jeong (ISOCC, 2022)

A 32-Gb/s PAM4-Binary Bridge With Sampler Offset Cancellation for Memory Testing. - Daeho Yun; Eonhui Lee; Woosong Jung; Kahyun Kim; Kyung-Min Beak; Jihee Kim; Hyun Bae Lee; Byeongseon Ko; Woo-Seok Choi; Deog-Kyoon Jeong (IEEE Trans. Circuits Syst. II Express Briefs, 2022)

A PAM4 Level Mismatch Adjustment Scheme for 48-Gb/s PAM4 Memory Tester Bridge. - Daeho Yun; Minsu Park; Kahyun Kim; Kyungmin Baek; Eonhui Lee; Woo-Seok Choi; Deog-Kyoon Jeong (A-SSCC, 2023)

A 48-Gb/s Single-Ended PAM-4 Receiver with Adaptive Nonlinearity Compensation. - Kahyun Kim; Daeho Yun; Kyungmin Baek; Woo-Seok Choi; Deog-Kyoon Jeong (ISCAS, 2023)

22.1 A 0.275pJ/b 42Gb/s/pin Clock-Referenced PAM3 Transceiver Tolerant to Supply Noise, Reference Offset and Crosstalk for Chiplets and Short-Reach Memory Interfaces. - Kahyun Kim; Jung-Hun Park; Ha-Jung Park; Jia Park; Jihee Kim; Woo-Seok Choi (ISSCC, 2025)

A 4 × 32 Gb/s 1.8 pJ/bit Collaborative Baud-Rate CDR With Background Eye-Climbing Algorithm and Low-Power Global Clock Distribution. - Jihee Kim; Jia Park; Jiwon Shin; Hanseok Kim; Kahyun Kim; Haengbeom Shin; Ha-Jung Park; Woo-Seok Choi (IEEE J. Solid State Circuits, 2025)

A Supply Noise-Insensitive Ring DCO With a Self-Biased Shunt Regulator Array in Wide-Range Digital PLL. - Kyungmin Baek; Jiho Kim; Kahyun Kim; Deog-Kyoon Jeong; Min-Seong Choo (IEEE Trans. Very Large Scale Integr. Syst., 2025)