An engineering model for short-channel MOS devices. - Kai-Yap Toh; Ping Keung Ko; Robert G. Meyer (IEEE J. Solid State Circuits, 1988)

A 23-ps/2.1-mW ECL gate with an AC-coupled active pull-down emitter-follower stage. - Kai-Yap Toh; Ching-Te Chuang; Tze-Chiang Chen; James D. Warnock (IEEE J. Solid State Circuits, 1989)