A design flow for multiplierless linear-phase FIR filters: from system specification to Verilog code. - Kai-Yuan Jheng; Shyh-Jye Jou; An-Yeu Wu (ISCAS (5), 2004)

DSP engine design for LINC wireless transmitter systems. - Kai-Yuan Jheng; Yi-Chiuan Wang; An-Yeu Wu; Hen-Wai Tsao (ISCAS, 2006)

A Shortened Impulse Response Filter (SIRF) Scheme for Cost-Effective Echo Canceller Design of 10GBase-T Ethernet System. - Ming-Feng Hsu; Yen-Liang Chen; Kai-Yuan Jheng; An-Yeu Wu (SiPS, 2006)

On-Line MSR-CORDIC VLSI Architecture with Applications to Cost-Efficient Rotation-Based Adaptive Filtering Systems. - Tzu-Hao Yu; Chi-Li Yu; Kai-Yuan Jheng; An-Yeu Wu (SiPS, 2006)

Multilevel Linc System Design for Power Efficiency Enhancement. - Kai-Yuan Jheng; Yuan-Jyue Chen; An-Yeu Wu (SiPS, 2007)

Multilevel LINC System Designs for Power Efficiency Enhancement of Transmitters. - Kai-Yuan Jheng; Yuan-Jyue Chen; An-Yeu Wu (IEEE J. Sel. Top. Signal Process., 2009)

Traffic- and Thermal-Aware Run-Time Thermal Management Scheme for 3D NoC Systems. - Chih-Hao Chao; Kai-Yuan Jheng; Haoyu Wang; Jia-Cheng Wu; An-Yeu Wu (NOCS, 2010)