FPGA Design for Autonomous Vehicle Driving Using Binarized Neural Networks. - Kaijie Wei; Koki Honda; Hideharu Amano (FPT, 2018)

FPGA/Python Co-Design for Lane Line Detection on a PYNQ-Z1 Board. - Koki Honda; Kaijie Wei; Hideharu Amano (MCSoC, 2019)

CLAHE implementation on a low-end FPGA board by high-level synthesis. - Koki Honda; Kaijie Wei; Masatoshi Arai; Hideharu Amano (CANDAR (Workshops), 2020)

Weight Least Square Filter for Improving the Quality of Depth Map on FPGA. - Renzhi Mao; Kaijie Wei; Hideharu Amano; Yuki Kuno; Masatoshi Arai (CANDAR (Workshops), 2021)

CLAHE Implementation and Evaluation on a Low-End FPGA Board by High-Level Synthesis. - Koki Honda; Kaijie Wei; Masatoshi Arai; Hideharu Amano (IEICE Trans. Inf. Syst., 2021)

An implementation methodology for Neural Network on a Low-end FPGA Board. - Kaijie Wei; Koki Honda; Hideharu Amano (Int. J. Netw. Comput., 2021)

RT-libSGM: An Implementation of a Real-time Stereo Matching System on FPGA. - Kaijie Wei; Yuki Kuno; Masatoshi Arai; Hideharu Amano (HEART, 2022)

An Implementation of a 3D Image Filter for Motion Vector Generation on an FPGA Board. - Yuchen Chen; Kaijie Wei; Hiroaki Nishi; Hideharu Amano (CANDAR, 2022)

An FPGA off-loading of HARK sound source localization. - Zhongyang Hou; Kaijie Wei; Hideharu Amano; Kazuhiro Nakadai (CANDARW, 2022)

Multi-board FPGA Implementation to Solve the Satisfiability Problem for Multi-Agent Path Finding in Smart Factory. - Pengyu Huang; Kaijie Wei; Hideharu Amano; Kaori Ohkoda; Masashi Aono (CANDARW, 2022)

Weighted Least Square Filter for Improving the Quality of Depth Map on FPGA. - Renzhi Mao; Kaijie Wei; Hideharu Amano; Yuki Kuno; Masatoshi Arai (Int. J. Netw. Comput., 2022)

Low power implementation of Geometric High-order Decorrelation-based Source Separation on an FPGA board. - Ziquan Qin; Kaijie Wei; Hideharu Amano; Kazuhiro Nakadai (COOL CHIPS, 2023)

Enormous-Scale Quantum State Vector Calculation with FPGA-accelerated SATA storages. - Ryohei Niwase; Hikaru Harasawa; Yoshiki Yamaguchi; Kaijie Wei; Hideharu Amano; Takefumi Miyoshi (ICFPT, 2023)

A state vector quantum simulator working on FPGAs with extensible SATA storage. - Kaijie Wei; Ryohei Niwase; Hideharu Amano; Yoshiki Yamaguchi; Takefumi Miyoshi (ICFPT, 2023)

A cost/power efficient storage system with directly connected FPGA and SATA disks. - Ryohei Niwase; Hikaru Harasawa; Yoshiki Yamaguchi; Kaijie Wei; Hideharu Amano (MCSoC, 2023)

RT-libSGM: FPGA-Oriented Real-Time Stereo Matching System with High Scalability. - Kaijie Wei; Yuki Kuno; Masatoshi Arai; Hideharu Amano (IEICE Trans. Inf. Syst., 2023)

A data compressor for FPGA-based state vector quantum simulators. - Kaijie Wei; Hideharu Amano; Ryohei Niwase; Yoshiki Yamaguchi (HEART, 2024)

FPT-EMS: An FPGA Implementation Using NB-LDPC Code for Continuous-Variable Quantum Key Distribution. - Kaijie Wei; Devanshu Garg; Ryutaro Nagai; Takao Tomono; Hideharu Amano (HEART, 2025)

Qu-Trefoil: Large-Scale Quantum Circuit Simulator Working on FPGA With SATA Storages. - Kaijie Wei; Hideharu Amano; Ryohei Niwase; Yoshiki Yamaguchi; Takefumi Miyoshi (IEEE Trans. Computers, 2025)