Modeling and optimization approach to robust and low-power FinFET SRAM design in nanoscale era. - Aditya Bansal; Saibal Mukhopadhyay; Kairshik Roy 001 (CICC, 2005)

Energy-Recovery Techniques to Reduce On-Chip Power Density in Molecular Nanotechnologies. - Myeong-Eun Hwang; Arijit Raychowdhury; Kairshik Roy 001 (IEEE Trans. Circuits Syst. I Regul. Pap., 2005)