VLSI Implementation of High Speed Energy-Efficient Truncated Multiplier. - Vijeyakumar Krishnasamy Natarajan; Elango Sekar; Kalaiselvi Sundaram (J. Circuits Syst. Comput., 2018)

Area-efficient parallel adder with faithful approximation for image and signal processing applications. - Gnanambikai Palanisamy; Vijeyakumar Krishnasamy Natarajan; Kalaiselvi Sundaram (IET Image Process., 2019)

Area Efficient Parallel Median Filter Using Approximate Comparator and Faithful Adder. - Vijeyakumar Krishnasamy Natarajan; Peter Thiagarajan Nelson Kingsley Joel; Shree Harpreet Singh Jatana; Natarajan Saravanakumar; Kalaiselvi Sundaram (IET Circuits Devices Syst., 2020)

Area-Energy-Error Optimized Faithful Multiplier for Digital Signal Processing. - Kalaiselvi Sundaram; Vijeyakumar Krishnasamy Natarajan; Nagarajan Shanmugam; Kousalya Manoharan; Ramya Ramasamy; Sriram Kumar (Circuits Syst. Signal Process., 2021)

Designing a Novel Star Topology using Operad Linear Differential Theory. - Kalaiselvi Sundaram; Seenivasan Vellupillai (Wirel. Pers. Commun., 2021)

Design of Precise Multiplier Using Inexact Compressor for Digital Signal Processing. - Nagarajan Shanmugam; Vijeyakumar Krishnasamy Natarajan; Kalaiselvi Sundaram; Natarajan Saravanakumar (Comput. Syst. Sci. Eng., 2022)

Linear Algebraic Theory for Designing the Bus Topology to Enhance the Data Transmission Process. - Kalaiselvi Sundaram; Seenivasan Velupillai (Wirel. Pers. Commun., 2022)