Modeling of dynamic errors in algorithmic A/D converters. - Kalle Folkesson; Christer Svensson; Jan-Erik Eklund (ISCAS (5), 2001)

Measurement verification of estimation method for time errors in a time-interleaved A/D converter system. - Jonas Elbornsson; Kalle Folkesson; Jan-Erik Eklund (ISCAS (3), 2002)

Robust multi-phase clock generation with reduced jitter. - Kalle Folkesson; Christer Svensson (SoCC, 2004)

A high-level dynamic-error model of a pipelined analog-to-digital converter. - Kalle Folkesson; Christer Svensson; B. Knuthammar; A. Dreyfert (ISCAS (6), 2005)

A 2.4-GHz RF sampling receiver front-end in 0.18-μm CMOS. - Darius Jakonis; Kalle Folkesson; Jerzy J. Dabrowski; Patrik Eriksson; Christer Svensson (IEEE J. Solid State Circuits, 2005)