Particle Swarm Optimization Based Circuit Synthesis of Reversible Logic. - Kamalika Datta; Indranil Sengupta 001; Hafizur Rahaman 001 (ISED, 2012)

Synthesis of Reversible Circuits Using Heuristic Search Method. - Kamalika Datta; Gaurav Rathi; Indranil Sengupta 001; Hafizur Rahaman 001 (VLSI Design, 2012)

Reversible logic implementation of AES algorithm. - Kamalika Datta; Vishal Shrivastav; Indranil Sengupta 001; Hafizur Rahaman 001 (DTIS, 2013)

An evolutionary approach to reversible logic synthesis using output permutation. - Kamalika Datta; Indranil Sengupta 001; Hafizur Rahaman 001; Rolf Drechsler (IDT, 2013)

ESOP-Based Synthesis of Reversible Circuit Using Improved Cube List. - Chandan Bandyopadhyay; Debashri Roy; Dipak Kumar Kole; Kamalika Datta; Hafizur Rahaman 001 (ISED, 2013)

Exploiting Negative Control Lines in the Optimization of Reversible Circuits. - Kamalika Datta; Gaurav Rathi; Robert Wille; Indranil Sengupta 001; Hafizur Rahaman 001; Rolf Drechsler (RC, 2013)

Particle Swarm Optimization Based Reversible Circuit Synthesis Using Mixed Control Toffoli Gates. - Kamalika Datta; Indranil Sengupta 001; Hafizur Rahaman 001 (J. Low Power Electron., 2013)

Partial encryption and watermarking scheme for audio files with controlled degradation of quality. - Kamalika Datta; Indranil Sengupta 001 (Multim. Tools Appl., 2013)

An ESOP-Based Reversible Circuit Synthesis Flow Using Simulated Annealing. - Kamalika Datta; Alhaad Gokhale; Indranil Sengupta 001; Hafizur Rahaman 001 (ACSS (2), 2014)

Optimizing DD-based synthesis of reversible circuits using negative control lines. - Eleonora Schönborn; Kamalika Datta; Robert Wille; Indranil Sengupta 001; Hafizur Rahaman 001; Rolf Drechsler (DDECS, 2014)

BDD based synthesis of Boolean functions using memristors. - Sayak Chakraborti; Paturi Varun Chowdhary; Kamalika Datta; Indranil Sengupta 001 (IDT, 2014)

RevVis: Visualization of Structures and Properties in Reversible Circuits. - Robert Wille; Jannis Stoppe; Eleonora Schönborn; Kamalika Datta; Rolf Drechsler (RC, 2014)

All Optical Reversible Multiplexer Design Using Mach-Zehnder Interferometer. - Kamalika Datta; Indranil Sengupta 001 (VLSID, 2014)

An Improved Reversible Circuit Synthesis Approach using Clustering of ESOP Cubes. - Kamalika Datta; Gaurav Rathi; Indranil Sengupta 001; Hafizur Rahaman 001 (ACM J. Emerg. Technol. Comput. Syst., 2014)

An Approach to Reversible Logic Synthesis Using Input and Output Permutations. - Kamalika Datta; Indranil Sengupta 001; Hafizur Rahaman 001; Rolf Drechsler (Trans. Comput. Sci., 2014)

Fast Qubit Placement in 2D Architecture Using Nearest Neighbor Realization. - Ritu Ranjan Shrivastwa; Kamalika Datta; Indranil Sengupta 001 (iNIS, 2015)

Towards a Cost Metric for Nearest Neighbor Constraints in Reversible Circuits. - Abhoy Kole; Kamalika Datta; Indranil Sengupta 001; Robert Wille (RC, 2015)

BDD-Based Synthesis for All-Optical Mach-Zehnder Interferometer Circuits. - Eleonora Schönborn; Kamalika Datta; Robert Wille; Indranil Sengupta 001; Hafizur Rahaman 001; Rolf Drechsler (VLSID, 2015)

All optical design of binary adders using semiconductor optical amplifier assisted Mach-Zehnder interferometer. - Kamalika Datta; Tanay Chattopadhyay; Indranil Sengupta 001 (Microelectron. J., 2015)

A Post-Synthesis Optimization Technique for Reversible Circuits Exploiting Negative Control Lines. - Kamalika Datta; Indranil Sengupta 001; Hafizur Rahaman 001 (IEEE Trans. Computers, 2015)

Area efficient implementation of ripple carry adder using memristor crossbar arrays. - Phrangboklang Lyngton Thangkhiew; Rahul Gharpinde; Varun Chowdhary Paturi; Kamalika Datta; Indranil Sengupta 001 (IDT, 2016)

An improved gate library for logic synthesis of optical circuits. - Shuchishman Burman; Kamalika Datta; Robert Wille; Indranil Sengupta 001; Rolf Drechsler (ISED, 2016)

Parameter sensing and object tracking using global positioning system. - Arghya P. Saikia Thengal; Naman Rastogi; Abhilash Medhi; Ritu Ranjan Shrivastwa; Kamalika Datta (ISED, 2016)

An Improved Approach for the Synthesis of Boolean Functions Using Memristor Based IMPLY and INVERSE-IMPLY Gates. - F. Lalchhandama; Brojo Gopal Sapui; Kamalika Datta (ISVLSI, 2016)

A Heuristic for Linear Nearest Neighbor Realization of Quantum Circuits by SWAP Gate Insertion Using N-Gate Lookahead. - Abhoy Kole; Kamalika Datta; Indranil Sengupta 001 (IEEE J. Emerg. Sel. Topics Circuits Syst., 2016)

Exact Synthesis of Ternary Reversible Functions Using Ternary Toffoli Gates. - Abhoy Kole; P. Mercy Nesa Rani; Kamalika Datta; Indranil Sengupta 001; Rolf Drechsler (ISMVL, 2017)

Test Pattern Generation Effort Evaluation of Reversible Circuits. - Abhoy Kole; Robert Wille; Kamalika Datta; Indranil Sengupta 001 (RC, 2017)

Design of Efficient Quantum Circuits Using Nearest Neighbor Constraint in 2D Architecture. - Leniency Marbaniang; Abhoy Kole; Kamalika Datta; Indranil Sengupta 001 (RC, 2017)

Improved Decomposition of Multiple-Control Ternary Toffoli Gates Using Muthukrishnan-Stroud Quantum Gates. - P. Mercy Nesa Rani; Abhoy Kole; Kamalika Datta; Indranil Sengupta 001 (RC, 2017)

Improved NCV Gate Realization of Arbitrary Size Toffoli Gates. - Abhoy Kole; Kamalika Datta (VLSID, 2017)

Exact Synthesis of Reversible Logic Circuits using Model Checking. - Rajarshi Ray 001; Arup Deka; Kamalika Datta (CoRR, 2017)

Modelling and Simulation of Non-Ideal MAGIC NOR Gates on Memristor Crossbar. - Naveen Murali G; F. Lalchhandama; Kamalika Datta; Indranil Sengupta 001 (ISED, 2018)

Fast In-Memory Computation of Boolean Functions in Memristive Crossbar Array. - Phrangboklang Lyngton Thangkhiew; Kamalika Datta (ISED, 2018)

Logic Design Using Memristors: An Emerging Technology. - Saeideh Shirinzadeh; Kamalika Datta; Rolf Drechsler (ISMVL, 2018)

Generalizing the Concept of Scalable Reversible Circuit Synthesis for Multiple-Valued Logic. - Alwin Zulehner; P. Mercy Nesa Rani; Kamalika Datta; Indranil Sengupta 001; Robert Wille (ISMVL, 2018)

Scalable in-memory mapping of Boolean functions in memristive crossbar array using simulated annealing. - Phrangboklang Lyngton Thangkhiew; Kamalika Datta (J. Syst. Archit., 2018)

A New Heuristic for N-Dimensional Nearest Neighbor Realization of a Quantum Circuit. - Abhoy Kole; Kamalika Datta; Indranil Sengupta 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018)

Efficient Mapping of Boolean Functions to Memristor Crossbar Using MAGIC NOR Gates. - Phrangboklang Lyngton Thangkhiew; Rahul Gharpinde; Kamalika Datta (IEEE Trans. Circuits Syst. I Regul. Pap., 2018)

A Scalable In-Memory Logic Synthesis Approach Using Memristor Crossbar. - Rahul Gharpinde; Phrangboklang Lyngton Thangkhiew; Kamalika Datta; Indranil Sengupta 001 (IEEE Trans. Very Large Scale Integr. Syst., 2018)

A staircase structure for scalable and efficient synthesis of memristor-aided logic. - Alwin Zulehner; Kamalika Datta; Indranil Sengupta 001; Robert Wille (ASP-DAC, 2019)

Exploiting Negative Control Lines and Nearest Neighbor for Improved Comparator Design. - Tathagato Bose; Kamalika Datta; Indranil Sengupta 001 (VLSID, 2019)

Design and Implementation of Threshold Logic Functions Using Memristors. - Yaswanth Krishna Yadav Danaboina; Pravanjan Samanta; Kamalika Datta; Indrajit Chakrabarti; Indranil Sengupta 001 (VLSID, 2019)

Mapping of Boolean Logic Functions onto 3D Memristor Crossbar. - Naveen Murali G; Peddireddi Satya Vardhan; F. Lalchhandama; Kamalika Datta; Indranil Sengupta 001 (VLSID, 2019)

Look-ahead mapping of Boolean functions in memristive crossbar array. - Dev Narayan Yadav; Phrangboklang Lyngton Thangkhiew; Kamalika Datta (Integr., 2019)

Efficient Design of Quantum Circuits Using Nearest Neighbor Constraint in 3D Architecture. - Leniency Marbaniang; Kamalika Datta (J. Circuits Syst. Comput., 2019)

Fledge: Flexible Edge Platforms Enabled by In-memory Computing. - Kamalika Datta; Arko Dutt; Ahmed Zaky; Umesh Chand; Devendra Singh; Yida Li; Jackson Chun-Yang Huang; Aaron Thean; Mohamed M. Sabry Aly (DATE, 2020)

Quantifying the Benefits of Monolithic 3D Computing Systems Enabled by TFT and RRAM. - Abdallah M. Felfel; Kamalika Datta; Arko Dutt; Hasita Veluri; Ahmed Zaky; Aaron Voon-Yew Thean; Mohamed M. Sabry Aly (DATE, 2020)

An efficient memristor crossbar architecture for mapping Boolean functions using Binary Decision Diagrams (BDD). - Phrangboklang Lyngton Thangkhiew; Alwin Zulehner; Robert Wille; Kamalika Datta; Indranil Sengupta 001 (Integr., 2020)

Improved Ternary Reversible Logic Synthesis Using Group Theoretic Approach. - P. Mercy Nesa Rani; Kamalika Datta (J. Circuits Syst. Comput., 2020)

Improved Mapping of Quantum Circuits to IBM QX Architectures. - Abhoy Kole; Stefan Hillmich; Kamalika Datta; Robert Wille; Indranil Sengupta 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)

Unlocking Sneak Path Analysis in Memristor Based Logic Design Styles. - Kamalika Datta; Saeideh Shirinzadeh; Phrangboklang Lyngton Thangkhiew; Indranil Sengupta 001; Rolf Drechsler (DSD, 2022)

SAT-based Exact Synthesis of Ternary Reversible Circuits using a Functionally Complete Gate Library. - Abhoy Kole; Kamalika Datta; Indranil Sengupta 001; Rolf Drechsler (DSD, 2022)

Mapping Quantum Circuits to 2-Dimensional Quantum Architectures. - Kamalika Datta; Abhoy Kole; Indranil Sengupta 001; Rolf Drechsler (GI-Jahrestagung, 2022)

Nearest Neighbor Mapping of Quantum Circuits to Two-Dimensional Hexagonal Qubit Architecture. - Kamalika Datta; Abhoy Kole; Indranil Sengupta 001; Rolf Drechsler (ISMVL, 2022)

Unlocking High Resolution Arithmetic Operations within Memristive Crossbars for Error Tolerant Applications. - Kamalika Datta; Saman Fröhlich; Saeideh Shirinzadeh; Dev Narayan Yadav; Indranil Sengupta 001; Rolf Drechsler (VLSI-SoC, 2022)

FAMCroNA: Fault Analysis in Memristive Crossbars for Neuromorphic Applications. - Dev Narayan Yadav; Phrangboklang Lyngton Thangkhiew; Kamalika Datta; Sandip Chakraborty 001; Rolf Drechsler; Indranil Sengupta 001 (J. Electron. Test., 2022)

In-Memory Computing on Resistive RAM Systems Using Majority Operation. - F. Lalchhandama; Mukesh Sahani; Vompolu Mohan Srinivas; Indranil Sengupta 001; Kamalika Datta (J. Circuits Syst. Comput., 2022)

CoMIC: Complementary Memristor based in-memory computing in 3D architecture. - F. Lalchhandama; Kamalika Datta; Sandip Chakraborty 001; Rolf Drechsler; Indranil Sengupta 001 (J. Syst. Archit., 2022)

Feed-Forward learning algorithm for resistive memories. - Dev Narayan Yadav; Phrangboklang Lyngton Thangkhiew; Kamalika Datta; Sandip Chakraborty 001; Rolf Drechsler; Indranil Sengupta 001 (J. Syst. Archit., 2022)

Automated Equivalence Checking Method for Majority Based In-Memory Computing on ReRAM Crossbars. - Arighna Deb; Kamalika Datta; Muhammad Hassan 002; Saeideh Shirinzadeh; Rolf Drechsler (ASP-DAC, 2023)

Extending the Design Space of Dynamic Quantum Circuits for Toffoli based Network. - Abhoy Kole; Arighna Deb; Kamalika Datta; Rolf Drechsler (DATE, 2023)

Memristors: Device Modeling, Design and Verification. - Kamalika Datta; Rolf Drechsler (iSES, 2023)

PolyMiR: Polynomial Formal Verification of the MicroRV32 Processor. - Lennart Weingarten; Kamalika Datta; Rolf Drechsler (NANOARCH, 2023)

Verification of In-Memory Logic Design using ReRAM Crossbars. - Kamalika Datta; Arighna Deb; Fatemeh Shirinzadeh; Abhoy Kole; Saeideh Shirinzadeh; Rolf Drechsler (NEWCAS, 2023)

Improved Cost-Metric for Nearest Neighbor Mapping of Quantum Circuits to 2-Dimensional Hexagonal Architecture. - Kamalika Datta; Abhoy Kole; Indranil Sengupta 001; Rolf Drechsler (RC, 2023)

Exploiting the Benefits of Clean Ancilla Based Toffoli Gate Decomposition Across Architectures. - Abhoy Kole; Kamalika Datta; Philipp Niemann 001; Indranil Sengupta 001; Rolf Drechsler (RC, 2023)

Impact of sneak paths on in-memory logic design in memristive crossbars. - Kamalika Datta; Arighna Deb; Abhoy Kole; Rolf Drechsler (it Inf. Technol., 2023)

Towards Formal Verification for MAC-based In-Memory Computing. - Fatemeh Shirinzadeh; Kamalika Datta; Saeideh Shirinzadeh; Abhoy Kole; Rolf Drechsler (ATS, 2024)

Improving Self-Fault-Tolerance Capability of Memristor Crossbar Using a Weight-Sharing Approach. - Dev Narayan Yadav; Phrangboklang Lyngton Thangkhiew; F. Lalchhandama; Kamalika Datta; Rolf Drechsler; Indranil Sengupta 001 (ATS, 2024)

Dynamic Realization of Multiple Control Toffoli Gate. - Abhoy Kole; Arighna Deb; Kamalika Datta; Rolf Drechsler (DATE, 2024)

Complete and Efficient Verification for a RISC-V Processor Using Formal Verification. - Lennart Weingarten; Kamalika Datta; Abhoy Kole; Rolf Drechsler (DATE, 2024)

Exploring the Potential of Decision Diagrams for Efficient In-Memory Design Verification. - Khushboo Qayyum; Abhoy Kole; Kamalika Datta; Muhammad Hassan 002; Rolf Drechsler (ACM Great Lakes Symposium on VLSI, 2024)

Towards Polynomial Formal Verification of Neuromorphic Architectures. - Lennart Weingarten; Kamalika Datta; Rolf Drechsler (ISED, 2024)

Design Automation Challenges and Benefits of Dynamic Quantum Circuit in Present NISQ Era and Beyond: (Invited Paper). - Abhoy Kole; Kamalika Datta; Rolf Drechsler (ISVLSI, 2024)

Is Simulation the only Alternative for Effective Verification of Dynamic Quantum Circuits? - Liam Hurwitz; Kamalika Datta; Abhoy Kole; Rolf Drechsler (RC, 2024)

Exploring the Potential of Dynamic Quantum Circuit for Improving Device Scalability. - Abhoy Kole; Kamalika Datta; Rolf Drechsler (SOCC, 2024)

In-Memory SAT-Solver for Self-Verification of Programmable Memristive Architectures. - Fatemeh Shirinzadeh; Arighna Deb; Saeideh Shirinzadeh; Abhoy Kole; Kamalika Datta; Rolf Drechsler (VLSID, 2024)

Exploiting the Extended Neighborhood of Hexagonal Qubit Architecture for Mapping Quantum Circuits. - Abhoy Kole; Kamalika Datta; Indranil Sengupta 001; Rolf Drechsler (ACM J. Emerg. Technol. Comput. Syst., 2024)

ReSG: A Data Structure for Verification of Majority-based In-memory Computing on ReRAM Crossbars. - Kousik Bhunia; Arighna Deb; Kamalika Datta; Muhammad Hassan 002; Saeideh Shirinzadeh; Rolf Drechsler (ACM Trans. Embed. Comput. Syst., 2024)

A new design of parity-preserving reversible multipliers based on multiple-control toffoli synthesis targeting emerging quantum circuits. - Mojtaba Noorallahzadeh; Mohammad Mosleh; Kamalika Datta (Frontiers Comput. Sci., 2024)

Late Breaking Results: Towards Efficient Formal Verification of Dot Product Architectures. - Lennart Weingarten; Kamalika Datta; Rolf Drechsler (DATE, 2025)

Towards an Automated Debugging Approach for Fault Identification in Quantum Circuits. - Anton Maidl; Abhoy Kole; Kamalika Datta; Jannis Stoppe; Rolf Drechsler (DDECS, 2025)

Multi-Input MAGIC Synthesis and Verification for In-Memory Computing Design. - Saeideh Nabipour; Kamalika Datta; Lennart Weingarten; Abhoy Kole; Rolf Drechsler (ISMVL, 2025)

Unlocking the Benefits of Dynamic Quantum Circuits in Resource Constraint Architecture. - Abhoy Kole; Mohammed E. Djeridane; Arighna Deb; Kamalika Datta; Indranil Sengupta 001; Rolf Drechsler (ISVLSI, 2025)

qSAT: Design of an Efficient Quantum Satisfiability Solver for Hardware Equivalence Checking. - Abhoy Kole; Mohammed E. Djeridane; Lennart Weingarten; Kamalika Datta; Rolf Drechsler (ACM J. Emerg. Technol. Comput. Syst., 2025)