Design of integrated reversible fault-tolerant arithmetic and logic unit. - Kamaraj Arunachalam; Marichamy P (Microprocess. Microsystems, 2019)

Fault Tolerance in Reversible Logic Circuits and Quantum Cost Optimization. - Kamaraj Arunachalam; Marichamy Perumalsamy; Kaviyashri K. Ponnusamy (Comput. Informatics, 2020)