Prototyping globally asynchronous locally synchronous circuits on commercial synchronous FPGAs (abstract only). - Mehrdad Najibi; Kamran Saleh; Mohsen Naderi; Hossein Pedram; Mehdi Sedighi (FPGA, 2005)

A novel clock generation scheme for globally asynchronous locally synchronous systems: an FPGA-validated approach. - Kamran Saleh; Mehrdad Najibi; Mohsen Naderi; Hossein Pedram; Mehdi Sedighi (ACM Great Lakes Symposium on VLSI, 2005)

Prototyping Globally Asynchronous Locally Synchronous Circuits on Commercial Synchronous FPGAs. - Mehrdad Najibi; Kamran Saleh; Mohsen Naderi; Hossein Pedram; Mehdi Sedighi (IEEE International Workshop on Rapid System Prototyping, 2005)

High-Level Optimization of Asynchronous Systems Utilizing Conditional Restructuring. - Mahtab Niknahad; Kamran Saleh; Mehrdad Najibi; Hossein Pedram (SoC, 2006)

Using standard asic back-end for qdi asynchronous circuits: dealing with isochronic fork constraint. - Mehrdad Najibi; Kamran Saleh; Hossein Pedram (ACM Great Lakes Symposium on VLSI, 2007)