Forecasting the behavior of multivariate time series using neural networks. - Kanad Chakraborty; Kishan Mehrotra; Chilukuri K. Mohan; Sanjay Ranka (Neural Networks, 1992)

Technology and layout-related testing of static random-access memories. - Kanad Chakraborty; Pinaki Mazumder (J. Electron. Test., 1994)

Response to letter by Q. Hu and D. B. Hertz. - Kanad Chakraborty; Kishan G. Mehrotra; Chilukuri K. Mohan; Sanjay Ranka (Neural Networks, 1994)

An efficient, bus-layout based method for early diagnosis of bussed driver shorts in printed circuit boards. - Kanad Chakraborty; Pinaki Mazumder (ICCAD, 1996)

A programmable boundary scan technique for board-level, parallel functional duplex march testing of word-oriented multiport static RAMs. - Kanad Chakraborty; Pinaki Mazumder (ED&TC, 1997)

BISRAMGEN: A silicon compiler for built-in self-repairable random-access memories. - Kanad Chakraborty (1997)

A Silicon Compiler for Fault-Tolerant ROMs. - Anurag Gupta; Kanad Chakraborty; Pinaki Mazumder (DFT, 1998)

FTROM: A Silicon Compiler for Fault-tolerant ROMs. - Anurag Gupta; Kanad Chakraborty; Pinaki Mazumder (Integr., 1998)

A Physical Design Tool for Built-in Self-Repairable Static RAMs. - Kanad Chakraborty; Anurag Gupta; Mayukh Bhattacharya; Shriram Kulkarni; Pinaki Mazumder (DATE, 1999)

Congestion Mitigation During Placement. - Kanad Chakraborty; Natesan Venkateswaran (Great Lakes Symposium on VLSI, 1999)

Transformational Placement and Synthesis. - Wilm E. Donath; Prabhakar Kudva; Leon Stok; Paul Villarrubia; Lakshmi N. Reddy; Andrew Sullivan; Kanad Chakraborty (DATE, 2000)

New March Tests for Multiport RAM Devices. - Kanad Chakraborty; Pinaki Mazumder (J. Electron. Test., 2000)

A physical design tool for built-in self-repairable RAMs. - Kanad Chakraborty; Shriram Kulkarni; Mayukh Bhattacharya; Pinaki Mazumder; Anurag Gupta (IEEE Trans. Very Large Scale Integr. Syst., 2001)

A signal integrity-driven buffer insertion technique for post-routing noise and delay optimization. - Kanad Chakraborty; David E. Long; John P. Fishburn; Kishore Singhal; Lun Ye; Christopher Ortiz (CICC, 2002)

A polynomial-time optimization algorithm for a rectilinear partitioning problem with applications in VLSI design automation. - Maharaj Mukherjee; Kanad Chakraborty (Inf. Process. Lett., 2002)

Testing and Reliability Techniques for High-Bandwidth Embedded RAMs. - Kanad Chakraborty (J. Electron. Test., 2004)

Efficient Techniques for Noise Characterization of Sequential Cells and Macros. - Venkat Rao Vallapenani; Ravi Shankar Chevuri; Bingxiong Xu; Lun Ye; Kanad Chakraborty (VLSI Design, 2006)

Novel algorithms for placement of rectangular covers for mask inspection in advanced lithography and other VLSI design applications. - Kanad Chakraborty; Alexey Lvov; Maharaj Mukherjee (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006)

A Randomized Greedy Algorithm for the Pattern Fill Problem for DFM Applications. - Maharaj Mukherjee; Kanad Chakraborty (ISQED, 2008)

A Randomized Greedy Method for Rectangular-Pattern Fill Problems. - Maharaj Mukherjee; Kanad Chakraborty (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008)

A MATLAB-based technique for defect level estimation using data mining of test fallout data versus fault coverage. - Kanad Chakraborty (ISQED, 2010)

Data-Driven DPPM Estimation and Adaptive Fault Coverage Calibration Using MATLAB®. - Kanad Chakraborty; Vishwani D. Agrawal (J. Electron. Test., 2012)

Novel Self-Timed, Pipelined Clock Scan Architecture. - Kanad Chakraborty; James E. Kelly; Brian P. Evans (J. Electron. Test., 2013)

DFT Static Verification using Early RTL Exploration and Debug for Mobile SoC and Edge AI Applications. - Vinod Viswanath; Kanad Chakraborty (VLSID, 2024)