Process Variation Aware Issue Queue Design. - Kanakagiri Raghavendra; Madhu Mutyam (DATE, 2008)

SkipCache: miss-rate aware cache management. - Kanakagiri Raghavendra; Tripti S. Warrier; Madhu Mutyam (PACT, 2012)

SAMO: store aware memory optimizations. - Kanakagiri Raghavendra; Tripti S. Warrier; Madhu Mutyam (Conf. Computing Frontiers, 2014)

SkipCache: application aware cache management for chip multi-processors. - Tripti S. Warrier; Kanakagiri Raghavendra; Madhu Mutyam (IET Comput. Digit. Tech., 2015)

PBC: Prefetched Blocks Compaction. - Kanakagiri Raghavendra; Biswabandan Panda; Madhu Mutyam (IEEE Trans. Computers, 2016)

MBZip: Multiblock Data Compression. - Kanakagiri Raghavendra; Biswabandan Panda; Madhu Mutyam (ACM Trans. Archit. Code Optim., 2017)

Router Buffer Caching for Managing Shared Cache Blocks in Tiled Multi-Core Processors. - Joe Augustine; Kanakagiri Raghavendra; John Jose; Madhu Mutyam (ICCD, 2020)