FPGA Accelerator for Radar-Based Human Activity Recognition. - Kangjie Long; Chaolin Rao; Xiangyu Zhang 002; Wen Bin Ye 001; Xin Lou (AICAS, 2022)

Analysis and Design of Precision-Scalable Computation Array for Efficient Neural Radiance Field Rendering. - Kangjie Long; Chaolin Rao; Yunxiang He; Zhechen Yuan; Pingqiang Zhou; Jingyi Yu; Xin Lou (IEEE Trans. Circuits Syst. I Regul. Pap., 2023)

FPGA Accelerator for Human Activity Recognition Based on Radar. - Kangjie Long; Chaolin Rao; Xiangyu Zhang 002; Wenbin Ye 001; Xin Lou (IEEE Trans. Circuits Syst. II Express Briefs, 2024)