Area-Efficient QC-LDPC Decoding Architecture With Thermometer Code-Based Sorting and Relative Quasi-Cyclic Shifting. - Boseon Jang; Hyejung Jang; Sungho Kim; Kangjoon Choi; In-Cheol Park (IEEE Trans. Circuits Syst. I Regul. Pap., 2024)

Hardware-Efficient SoftMax Architecture With Bit-Wise Exponentiation and Reciprocal Calculation. - Jeongmin Kim; Sungho Kim; Kangjoon Choi; In-Cheol Park (IEEE Trans. Circuits Syst. I Regul. Pap., 2024)

Hardware-Friendly Approximation for Swish Activation and Its Implementation. - Kangjoon Choi; Sungho Kim; Jeongmin Kim; In-Cheol Park (IEEE Trans. Circuits Syst. II Express Briefs, 2024)

Hardware-Efficient Architecture for Multiple Quantized Gaussian Noise Generation. - Kangjoon Choi; In-Cheol Park (IEEE Trans. Circuits Syst. I Regul. Pap., 2025)