A 0.010mm2 9.92psrms low tracking jitter pixel clock generator with a divider initializer and a nearest phase selector in 28nm CMOS technology. - Kangyeop Choo; Sung-Jin Kim; Wooseok Kim; Jihyun F. Kim; Taeik Kim; Hojin Park (CICC, 2014)

A 0.02mm2 fully synthesizable period-jitter sensor using stochastic TDC without reference clock and calibration in 10nm CMOS technology. - Kangyeop Choo; Hyunik Kim; Wooseok Kim; Jihyun F. Kim; Taeik Kim; Hyung Jong Ko (ISSCC, 2018)