An algebraic decision diagram (ADD) based technique to find leakage histograms of combinational designs. - Kanupriya Gulati; Nikhil Jayakumar; Sunil P. Khatri (ISLPED, 2005)

Controlling inductive cross-talk and power in off-chip buses using CODECs. - Brock J. LaMeres; Kanupriya Gulati; Sunil P. Khatri (ASP-DAC, 2006)

A design flow to optimize circuit delay by using standard cells and PLAs. - Rajesh Garg; Mario Sánchez; Kanupriya Gulati; Nikhil Jayakumar; Anshul Gupta; Sunil P. Khatri (ACM Great Lakes Symposium on VLSI, 2006)

Network coding for routability improvement in VLSI. - Nikhil Jayakumar; Sunil P. Khatri; Kanupriya Gulati; Alexander Sprintson (ICCAD, 2006)

An Efficient, Scalable Hardware Engine for Boolean SATisfiability. - Mandar Waghmode; Kanupriya Gulati; Sunil P. Khatri; Weiping Shi (ICCD, 2006)

Memory-based crosstalk canceling CODECs for on-chip buses. - Chunjie Duan; Kanupriya Gulati; Sunil P. Khatri (ISCAS, 2006)

A probabilistic method to determine the minimum leakage vector for combinational designs. - Kanupriya Gulati; Nikhil Jayakumar; Sunil P. Khatri (ISCAS, 2006)

Efficient don't care computation for hierarchical designs. - Kanupriya Gulati; M. Lovell; Sunil P. Khatri (ISCAS, 2006)

On Complexity of Internal and External Equivalence Checking. - Eugene Goldberg; Kanupriya Gulati (DSD, 2007)

Toggle Equivalence Preserving (TEP) Logic Optimization. - Eugene Goldberg; Kanupriya Gulati; Sunil P. Khatri (DSD, 2007)

A Structured ASIC Design Approach Using Pass Transistor Logic. - Kanupriya Gulati; Nikhil Jayakumar; Sunil P. Khatri (ISCAS, 2007)

Towards acceleration of fault simulation using graphics processing units. - Kanupriya Gulati; Sunil P. Khatri (DAC, 2008)

Improving FPGA routability using network coding. - Kanupriya Gulati; Sunil P. Khatri (ACM Great Lakes Symposium on VLSI, 2008)

Efficient, scalable hardware engine for Boolean satisfiability and unsatisfiable core extraction. - Kanupriya Gulati; Mandar Waghmode; Sunil P. Khatri; Weiping Shi (IET Comput. Digit. Tech., 2008)

A probabilistic method to determine the minimum leakage vector for combinational designs in the presence of random PVT variations. - Kanupriya Gulati; Nikhil Jayakumar; Sunil P. Khatri; D. M. H. Walker (Integr., 2008)

SAT-based ATPG using multilevel compatible don't-cares. - Nikhil Saluja; Kanupriya Gulati; Sunil P. Khatri (ACM Trans. Design Autom. Electr. Syst., 2008)

Highly parallel decoding of space-time codes on graphics processing units. - Kalyana C. Bollapalli; Yiyue Wu; Kanupriya Gulati; Sunil P. Khatri; A. Robert Calderbank (Allerton, 2009)

Fast circuit simulation on graphics processing units. - Kanupriya Gulati; John F. Croix; Sunil P. Khatri; Rahm Shastry (ASP-DAC, 2009)

Accelerating statistical static timing analysis using graphics processing units. - Kanupriya Gulati; Sunil P. Khatri (ASP-DAC, 2009)

Closed-loop modeling of power and temperature profiles of FPGAs. - Kanupriya Gulati; Sunil P. Khatri; Peng Li 001 (FPGA, 2009)

Low power and high performance sram design using bank-based selective forward body bias. - Kalyana C. Bollapalli; Rajesh Garg; Kanupriya Gulati; Sunil P. Khatri (ACM Great Lakes Symposium on VLSI, 2009)

Robust window-based multi-node technology-independent logic minimization. - Jeff L. Cobb; Kanupriya Gulati; Sunil P. Khatri (ACM Great Lakes Symposium on VLSI, 2009)

Fault table generation using Graphics Processing Units. - Kanupriya Gulati; Sunil P. Khatri (HLDVT, 2009)

On-chip bidirectional wiring for heavily pipelined systems using network coding. - Kalyana C. Bollapalli; Rajesh Garg; Kanupriya Gulati; Sunil P. Khatri (ICCD, 2009)

Sorting Binary Numbers in Hardware - A Novel Algorithm and its Implementation. - Srikanth Alaparthi; Kanupriya Gulati; Sunil P. Khatri (ISCAS, 2009)

Selective Forward Body Bias for High Speed and Low Power SRAMs. - Kalyana C. Bollapalli; Rajesh Garg; Kanupriya Gulati; Sunil P. Khatri (J. Low Power Electron., 2009)

FPGA-based hardware acceleration for Boolean satisfiability. - Kanupriya Gulati; Suganth Paul; Sunil P. Khatri; Srinivas Patil; Abhijit Jas (ACM Trans. Design Autom. Electr. Syst., 2009)

Boolean satisfiability on a graphics processor. - Kanupriya Gulati; Sunil P. Khatri (ACM Great Lakes Symposium on VLSI, 2010)

Fault Table Computation on GPUs. - Kanupriya Gulati; Sunil P. Khatri (J. Electron. Test., 2010)

Using GPUs to Accelerate CAD Algorithms. - John F. Croix; Sunil P. Khatri; Kanupriya Gulati (IEEE Des. Test, 2013)