A Method for Fast Hardware Specialization at run-time. - Karel Bruneel; Peter Bertels; Dirk Stroobandt (FPL, 2007)

Automatic generation of run-time parameterizable configurations. - Karel Bruneel; Dirk Stroobandt (FPL, 2008)

Reconfigurability-Aware Structural Mapping for LUT-Based FPGAs. - Karel Bruneel; Dirk Stroobandt (ReConFig, 2008)

Loop Transformations to Reduce the Dynamic FPGA Recon?guration Overhead. - Tom Degryse; Karel Bruneel; Harald Devos; Dirk Stroobandt (ReConFig, 2008)

Automatically mapping applications to a self-reconfiguring platform. - Karel Bruneel; Fatma Abouelella; Dirk Stroobandt (DATE, 2009)

Towards a more efficient run-time FPGA configuration generation. - Fatma Abouelella; Karel Bruneel; Dirk Stroobandt (PARCO, 2009)

Applying Parameterizable Dynamic Configurations to Sequence Alignment. - Tom Davidson; Karel Bruneel; Harald Devos; Dirk Stroobandt (PARCO, 2009)

TROUTE: A Reconfigurability-Aware FPGA Router. - Karel Bruneel; Dirk Stroobandt (ARC, 2010)

Automatic tool flow for shift-register-LUT reconfiguration: making run-time reconfiguration fast and easy (abstract only). - Brahim Al Farisi; Karel Bruneel; Harald Devos; Dirk Stroobandt (FPGA, 2010)

Efficiently Generating FPGA Configurations through a Stack Machine. - Fatma Abouelella; Karel Bruneel; Dirk Stroobandt (FPL, 2010)

Run-Time Reconfiguration for Automatic Hardware/Software Partitioning. - Tom Davidson; Karel Bruneel; Dirk Stroobandt (ReConFig, 2010)

Memory-Efficient and Fast Run-Time Reconfiguration of Regularly Structured Designs. - Brahim Al Farisi; Karel Heyse; Karel Bruneel; Dirk Stroobandt (FPL, 2011)

A Dynamically Reconfigurable Pattern Matcher for Regular Expressions on FPGA. - Tom Davidson; Mattias Merlier; Karel Bruneel; Dirk Stroobandt (PARCO, 2011)

RecoNoC: A reconfigurable network-on-chip. - Robbe Vancayseele; Brahim Al Farisi; Wim Heirman; Karel Bruneel; Dirk Stroobandt (ReCoSoC, 2011)

Dynamic data folding with parameterizable FPGA configurations. - Karel Bruneel; Wim Heirman; Dirk Stroobandt (ACM Trans. Design Autom. Electr. Syst., 2011)

Automating Reconfiguration Chain Generation for SRL-Based Run-Time Reconfiguration. - Karel Heyse; Brahim Al Farisi; Karel Bruneel; Dirk Stroobandt (ARC, 2012)

A Connection Router for the Dynamic Reconfiguration of FPGAs. - Elias Vansteenkiste; Karel Bruneel; Dirk Stroobandt (ARC, 2012)

FASTER: Facilitating Analysis and Synthesis Technologies for Effective Reconfiguration. - Dionisios N. Pnevmatikatos; Tobias Becker; Andreas Brokalakis; Karel Bruneel; Georgi Gaydadjiev; Wayne Luk; Kyprianos Papadimitriou; Ioannis Papaefstathiou; Oliver Pell; Christian Pilato; M. Robart; Marco D. Santambrogio; et al. (DSD, 2012)

Automatically exploiting regularity in applications to reduce reconfiguration memory requirements. - Fatma Abouelella; Karel Bruneel; Dirk Stroobandt (FPL, 2012)

Mapping logic to reconfigurable FPGA routing. - Karel Heyse; Karel Bruneel; Dirk Stroobandt (FPL, 2012)

Maximizing the reuse of routing resources in a reconfiguration-aware connection router. - Elias Vansteenkiste; Karel Bruneel; Dirk Stroobandt (FPL, 2012)

Dynamic Circuit Specialisation for Key-Based Encryption Algorithms and DNA Alignment. - Tom Davidson; Fatma Abouelella; Karel Bruneel; Dirk Stroobandt (Int. J. Reconfigurable Comput., 2012)

An automatic tool flow for the combined implementation of multi-mode circuits. - Brahim Al Farisi; Karel Bruneel; João M. P. Cardoso; Dirk Stroobandt (DATE, 2013)

Staticroute: A novel router for the Dynamic Partial Reconfiguration of FPGAS. - Brahim Al Farisi; Karel Bruneel; Dirk Stroobandt (FPL, 2013)

Efficient implementation of Virtual Coarse Grained Reconfigurable Arrays on FPGAS. - Karel Heyse; Tom Davidson; Elias Vansteenkiste; Karel Bruneel; Dirk Stroobandt (FPL, 2013)

A connection-based router for FPGAs. - Elias Vansteenkiste; Karel Bruneel; Dirk Stroobandt (FPT, 2013)

A novel tool flow for increased routing configuration similarity in multi-mode circuits. - Brahim Al Farisi; Elias Vansteenkiste; Karel Bruneel; Dirk Stroobandt (ISVLSI, 2013)

How to efficiently implement dynamic circuit specialization systems. - Fatma Abouelella; Tom Davidson; Wim Meeus; Karel Bruneel; Dirk Stroobandt (ACM Trans. Design Autom. Electr. Syst., 2013)

TPaR: Place and Route Tools for the Dynamic Reconfiguration of the FPGA's Interconnect Network. - Elias Vansteenkiste; Brahim Al Farisi; Karel Bruneel; Dirk Stroobandt (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014)

Enabling FPGA routing configuration sharing in dynamic partial reconfiguration. - Brahim Al Farisi; Karel Heyse; Karel Bruneel; João M. P. Cardoso; Dirk Stroobandt (Des. Autom. Embed. Syst., 2015)

FASTER: Facilitating Analysis and Synthesis Technologies for Effective Reconfiguration. - Dionisios N. Pnevmatikatos; Kyprianos Papadimitriou; Tobias Becker; Peter Böhm; Andreas Brokalakis; Karel Bruneel; Catalin Bogdan Ciobanu; Tom Davidson; Georgi Gaydadjiev; Karel Heyse; Wayne Luk; Xinyu Niu; et al. (Microprocess. Microsystems, 2015)

TCONMAP: Technology Mapping for Parameterised FPGA Configurations. - Karel Heyse; Brahim Al Farisi; Karel Bruneel; Dirk Stroobandt (ACM Trans. Design Autom. Electr. Syst., 2015)

Identification of Dynamic Circuit Specialization Opportunities in RTL Code. - Tom Davidson; Elias Vansteenkiste; Karel Heyse; Karel Bruneel; Dirk Stroobandt (ACM Trans. Reconfigurable Technol. Syst., 2015)