The Potential of FinFETs for Analog and RF Circuit Applications. - Piet Wambacq; Bob Verbruggen; Karen Scheir; Jonathan Borremans; Morin Dehan; Dimitri Linten; Vincent De Heyn; Geert Van der Plas; Abdelkarim Mercha; Bertrand Parvais; Cedric Gustin; Vaidyanathan Subramanian; et al. (IEEE Trans. Circuits Syst. I Regul. Pap., 2007)

A 52GHz Phased-Array Receiver Front-End in 90nm Digital CMOS. - Karen Scheir; Stephane Bronckers; Jonathan Borremans; Piet Wambacq; Yves Rolain (ISSCC, 2008)

Advanced Planar Bulk and Multigate CMOS Technology: Analog-Circuit Benchmarking up to mm-Wave Frequencies. - Piet Wambacq; Abdelkarim Mercha; Karen Scheir; Bob Verbruggen; Jonathan Borremans; Vincent De Heyn; Steven Thijs; Dimitri Linten; Geert Van der Plas; Bertrand Parvais; Morin Dehan; Stefaan Decoutere; et al. (ISSCC, 2008)

A 52 GHz Phased-Array Receiver Front-End in 90 nm Digital CMOS. - Karen Scheir; Stephane Bronckers; Jonathan Borremans; Piet Wambacq; Yves Rolain (IEEE J. Solid State Circuits, 2008)

A 57-to-66GHz quadrature PLL in 45nm digital CMOS. - Karen Scheir; Gerd Vandersteen; Yves Rolain; Piet Wambacq (ISSCC, 2009)

A Methodology to Predict the Impact of Substrate Noise in Analog/RF Systems. - Stephane Bronckers; Karen Scheir; Geert Van der Plas; Gerd Vandersteen; Yves Rolain (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009)

A 40 nm LP CMOS PLL for high-speed mm-wave communication. - Bertrand Parvais; Karen Scheir; Vojkan Vidojkovic; R. Vandebriel; Gerd Vandersteen; Charlotte Soens; Piet Wambacq (ESSCIRC, 2010)

A fifth-order 880MHz/1.76GHz active lowpass filter for 60GHz communications in 40nm digital CMOS. - Piet Wambacq; Vito Giannini; Karen Scheir; Wim Van Thillo; Yves Rolain (ESSCIRC, 2010)