Real-time structured analysis in system level design of embedded ASICs. - Timo Juntunen; Jorma Kivelä; Auli Reinikka; Matti Sipola; Juha-Pekka Soininen; Kari Tiensyrjä; Tuomo Tikkanen (Microprocess. Microprogramming, 1988)

SW/HW-partitioning of real-time embedded systems. - Juha-Pekka Soininen; Matti Sipola; Kari Tiensyrjä (Microprocessing and Microprogramming, 1989)

Boundary Scan Testing Combined with Power Supply Current Monitoring. - Matti Kärkkäinen; Kari Tiensyrjä; Matti Weissenfelt (EDAC-ETC-EUROASIC, 1994)

Cosimulation of real-time control systems. - Juha-Pekka Soininen; Tuomo Huttunen; Kari Tiensyrjä; Hannu Heusala (EURO-DAC, 1995)

Interactive codesign for real-time embedded control systems: task graph generation from SA/VHDL models. - Sien-An Ong; Kari Tiensyrjä; Lech Józwiak (EUROMICRO, 1997)

A Network on Chip Architecture and Design Methodology. - Shashi Kumar; Axel Jantsch; Mikael Millberg; Johnny Öberg; Juha-Pekka Soininen; Martti Forsell; Kari Tiensyrjä; Ahmed Hemani (ISVLSI, 2002)

SystemC and OCAPI-xl Based System-Level Design for Reconfigurable Systems-on-Chip. - Kari Tiensyrjä; Miroslav Cupák; Kostas Masselos; Marko Pettissalo (FDL, 2004)

System-Level Modeling of Dynamically Reconfigurable Co-processors. - Yang Qu; Kari Tiensyrjä; Kostas Masselos (FPL, 2004)

SystemC-based Design Methodology for Reconfigurable System-on-Chip. - Yang Qu; Kari Tiensyrjä; Juha-Pekka Soininen (DSD, 2005)

Layered UML Workload and SystemC Platform Models. - Jari Kreku; Yang Qu; Juha-Pekka Soininen; Kari Tiensyrjä (FDL, 2006)

System Level Architecture Exploration for Reconfigurable Systems On Chip. - Konstantinos Masselos; Kari Tiensyrjä; Yang Qu; Nikolaos S. Voros; Miroslav Cupák; Luc Rijnders; Marko Pettissalo (FPL, 2006)

SystemC workload model generation from UML for performance simulation. - Jari Kreku; Mika Hoppari; Kari Tiensyrjä; Per Andersson (FDL, 2007)

System-Level Design for Partially Reconfigurable Hardware. - Yang Qu; Kari Tiensyrjä; Juha-Pekka Soininen; Jari Nurmi (ISCAS, 2007)

Application - Platform Performance Modeling and Evaluation. - Jari Kreku; Mika Hoppari; Tuomo Kestilä; Yang Qu; Juha-Pekka Soininen; Kari Tiensyrjä (FDL, 2008)

Application Workload and SystemC Platform Modeling for Performance Evaluation. - Jari Kreku; Mika Hoppari; Tuomo Kestilä; Yang Qu; Juha-Pekka Soininen; Kari Tiensyrjä (FDL (Selected Papers), 2008)

Combining UML2 Application and SystemC Platform Modelling for Performance Evaluation of Real-Time Embedded Systems. - Jari Kreku; Mika Hoppari; Tuomo Kestilä; Yang Qu; Juha-Pekka Soininen; Per Andersson; Kari Tiensyrjä (EURASIP J. Embed. Syst., 2008)

Design Flow Instantiation for Run-Time Reconfigurable Systems: A Case Study. - Yang Qu; Kari Tiensyrjä; Juha-Pekka Soininen; Jari Nurmi (EURASIP J. Embed. Syst., 2008)

Linking GENESYS application architecture modelling with platform performance simulation. - Subayal Khan; Susanna Pantsar-Syväniemi; Jari Kreku; Kari Tiensyrjä; Juha-Pekka Soininen (FDL, 2009)

Automatic workload generation for system-level exploration based on modified GCC compiler. - Jari Kreku; Kari Tiensyrjä; Geert Vanmeerbeeck (DATE, 2010)

Instantiating GENESYS Application Architecture Modeling via UML 2.0 Constructs and MARTE Profile. - Subayal Khan; Kari Tiensyrjä; Jari Nurmi (DSD, 2010)

From Y-chart to seamless integration of application design and performance simulation. - Subayal Khan; Eila Ovaska; Kari Tiensyrjä; Jari Nurmi (SoC, 2010)

The MOSART Mapping Optimization for Multi-Core ARchiTectures. - Bernard Candaele; Sylvain Aguirre; Michel Sarlotte; Iraklis Anagnostopoulos; Sotirios Xydis; Alexandros Bartzas; Dimitris Bekiaris; Dimitrios Soudris; Zhonghai Lu; Xiaowen Chen; Jean-Michel Chabloz; Ahmed Hemani; et al. (ISVLSI (Selected papers), 2010)

Mapping Optimisation for Scalable Multi-core ARchiTecture: The MOSART Approach. - Bernard Candaele; Sylvain Aguirre; Michel Sarlotte; Iraklis Anagnostopoulos; Sotirios Xydis; Alexandros Bartzas; Dimitris Bekiaris; Dimitrios Soudris; Zhonghai Lu; Xiaowen Chen; Jean-Michel Chabloz; Ahmed Hemani; et al. (ISVLSI, 2010)

Multi-threading support for system-level performance simulation of multi-core architectures. - Jukka Saastamoinen; Subayal Khan; Kari Tiensyrjä; Tapio Taipale (ARCS Workshops, 2011)

System Level Performance Simulation of Distributed GENESYS Applications on Multi-core Platforms. - Subayal Aftab Khan; Jukka Saastamoinen; Kari Tiensyrjä; Jari Nurmi (DASC, 2011)

Early-phase performance exploration of embedded systems with ABSOLUT framework. - Janne Vatjus Anttila; Jari Kreku; Juha Korpi; Subayal Khan; Jukka Saastamoinen; Kari Tiensyrjä (J. Syst. Archit., 2013)