Thermal resilient bounded-skew clock tree optimization methodology. - Ashutosh Chakraborty; Prassanna Sithambaram; Karthik Duraisami; Alberto Macii; Enrico Macii; Massimo Poncino (DATE, 2006)

Implications of ultra low-voltage devices on design techniques for controlling leakage in NanoCMOS circuits. - Ashutosh Chakraborty; Karthik Duraisami; Ashoka Visweswara Sathanur; Prassanna Sithambaram; Alberto Macii; Enrico Macii; Massimo Poncino (ISCAS, 2006)

Dynamic Management of Thermally-Induced Clock Skew: An Implementation Perspective. - Ashutosh Chakraborty; Karthik Duraisami; Ashoka Visweswara Sathanur; Prassanna Sithambaram; Alberto Macii; Enrico Macii; Massimo Poncino (PATMOS, 2006)

Design Exploration of a Thermal Management Unit for Dynamic Control of Temperature-Induced Clock Skew. - Karthik Duraisami; Prassanna Sithambaram; Ashoka Visweswara Sathanur; Alberto Macii; Enrico Macii; Massimo Poncino (ISCAS, 2007)

Energy efficiency bounds of pulse-encoded buses. - Karthik Duraisami; Enrico Macii; Massimo Poncino (ACM Great Lakes Symposium on VLSI, 2008)

Implementation of a thermal management unit for canceling temperature-dependent clock skew variations. - Ashutosh Chakraborty; Karthik Duraisami; Ashoka Visweswara Sathanur; Prassanna Sithambaram; Alberto Macii; Enrico Macii; Massimo Poncino (Integr., 2008)

Thermal-Aware Design Techniques for Nanometer CMOS Circuits. - Andrea Calimera; Karthik Duraisami; Ashoka Visweswara Sathanur; Prassanna Sithambaram; R. Iris Bahar; Alberto Macii; Enrico Macii; Massimo Poncino (J. Low Power Electron., 2008)

Dynamic Thermal Clock Skew Compensation Using Tunable Delay Buffers. - Ashutosh Chakraborty; Karthik Duraisami; Ashoka Visweswara Sathanur; Prassanna Sithambaram; Luca Benini; Alberto Macii; Enrico Macii; Massimo Poncino (IEEE Trans. Very Large Scale Integr. Syst., 2008)

Using soft-edge flip-flops to compensate NBTI-induced delay degradation. - Karthik Duraisami; Enrico Macii; Massimo Poncino (ACM Great Lakes Symposium on VLSI, 2009)

Thermal-Aware Clock Tree Design to Increase Timing Reliability of Embedded SoCs. - Ashutosh Chakraborty; Karthik Duraisami; Prassanna Sithambaram; Alberto Macii; Enrico Macii; Massimo Poncino (IEEE Trans. Circuits Syst. I Regul. Pap., 2010)