Fundamental Limitations of Continuous-Time Delta-Sigma Modulators Due to Clock Jitter. - Karthikeyan Reddy; Shanthi Pavan (IEEE Trans. Circuits Syst. I Regul. Pap., 2007)

A 20.7mW continuous-time ΔΣ modulator with 15MHz bandwidth and 70 dB dynamic range. - Karthikeyan Reddy; Shanthi Pavan (ESSCIRC, 2008)

A 16mW 78dB-SNDR 10MHz-BW CT-ΔΣ ADC using residue-cancelling VCO-based quantizer. - Karthikeyan Reddy; Sachin Rao; Rajesh Inti; Brian Young; Amr Elshazly; Mrunmay Talegaonkar; Pavan Kumar Hanumolu (ISSCC, 2012)

A 16-mW 78-dB SNDR 10-MHz BW CT Delta Sigma ADC Using Residue-Cancelling VCO-Based Quantizer. - Karthikeyan Reddy; Sachin Rao; Rajesh Inti; Brian Young; Amr Elshazly; Mrunmay Talegaonkar; Pavan Kumar Hanumolu (IEEE J. Solid State Circuits, 2012)

A VCO-based current-to-digital converter for sensor applications. - Praveen Prabha; Seong Joong Kim; Karthikeyan Reddy; Sachin Rao; Nathanael Griesert; Arun Rao; Greg Winter; Pavan Kumar Hanumolu (CICC, 2014)

A 75dB DR 50MHz BW 3rd order CT-ΔΣ modulator using VCO-based integrators. - Brian Young; Karthik Reddy; Sachin Rao; Amr Elshazly; Tejasvi Anand; Pavan Kumar Hanumolu (VLSIC, 2014)

A Deterministic Digital Background Calibration Technique for VCO-Based ADCs. - Sachin Rao; Karthikeyan Reddy; Brian Young; Pavan Kumar Hanumolu (IEEE J. Solid State Circuits, 2014)

An 8 Gb/s-64 Mb/s, 2.3-4.2 mW/Gb/s Burst-Mode Transmitter in 90 nm CMOS. - Mrunmay Talegaonkar; Amr Elshazly; Karthikeyan Reddy; Praveen Prabha; Tejasvi Anand; Pavan Kumar Hanumolu (IEEE J. Solid State Circuits, 2014)

A 54mW 1.2GS/s 71.5dB SNDR 50MHz BW VCO-based CT ΔΣ ADC using dual phase/frequency feedback in 65nm CMOS. - Karthikeyan Reddy; Siladitya Dey 002; Sachin Rao; Brian Young; Praveen Prabha; Pavan Kumar Hanumolu (VLSIC, 2015)

A Highly Digital VCO-Based ADC Architecture for Current Sensing Applications. - Praveen Prabha; Seong Joong Kim; Karthikeyan Reddy; Sachin Rao; Nathanael Griesert; Arun Rao; Greg Winter; Pavan Kumar Hanumolu (IEEE J. Solid State Circuits, 2015)

Embedded Vision System for Atmospheric Turbulence Mitigation. - Ajinkya D. Deshmukh; Gaurav Bhosale; Swarup S. Medasani; Karthik Reddy; P. Hemantha Kumar; A. Chandrasekhar; P. Kiran Kumar; K. Vijayasagar (CVPR Workshops, 2016)

A 50 MHz BW 73.5 dB SNDR two-stage continuous-time ΔΣ modulator with VCO quantizer nonlinearity cancellation. - Siladitya Dey 002; Karthikeyan Reddy; Kartikeya Mayaram; Terri S. Fiez (CICC, 2017)

High Capacity, Secure (n, n/8) Multi Secret Image Sharing Scheme with Security Key. - Karthik Reddy; Tejas K; Swathi C; Ashok K; Rajesh Kumar M (CoRR, 2017)

Study on Attenuation Properties of Surface Wave of AE Simulation Source Based on OPCM Sensor Element. - Ziping Wang; Xian Xue; Xingjia Li; Zhengxuan Jiang; Karthik Reddy (J. Sensors, 2018)

A 50 MHz BW 76.1 dB DR Two-Stage Continuous-Time Delta-Sigma Modulator With VCO Quantizer Nonlinearity Cancellation. - Siladitya Dey 002; Karthikeyan Reddy; Kartikeya Mayaram; Terri S. Fiez (IEEE J. Solid State Circuits, 2018)

An Optimized GPU Kernel for Real-Time Radio Imaging. - Karthik Reddy; Judd D. Bowman; Adam P. Beardsley; Gregory B. Taylor; Jayce Dowell; Craig Taylor (HPCC/DSS/SmartCity/DependSys, 2023)