A design space evaluation of grid processor architectures. - Ramadass Nagarajan; Karthikeyan Sankaralingam; Doug Burger; Stephen W. Keckler (MICRO, 2001)

Distributed Pagerank for P2P Systems. - Karthikeyan Sankaralingam; Simha Sethumadhavan; James C. Browne (HPDC, 2003)

Routed Inter-ALU Networks for ILP Scalability and Performance. - Karthikeyan Sankaralingam; Vincent Ajay Singh; Stephen W. Keckler; Doug Burger (ICCD, 2003)

Universal Mechanisms for Data-Parallel Architectures. - Karthikeyan Sankaralingam; Stephen W. Keckler; William R. Mark; Doug Burger (MICRO, 2003)

Pagerank Computation and Keyword Search on Distributed Systems and P2P Networks. - Karthikeyan Sankaralingam; Madhulika Yalamanchi; Simha Sethumadhavan; James C. Browne (J. Grid Comput., 2003)

Exploiting ILP, TLP, and DLP with the Polymorphous TRIPS Architecture. - Karthikeyan Sankaralingam; Ramadass Nagarajan; Haiming Liu 001; Changkyu Kim; Jaehyuk Huh 001; Doug Burger; Stephen W. Keckler; Charles R. Moore (IEEE Micro, 2003)

General parallel computations on desktop grid and P2P systems. - James C. Browne; Madhulika Yalamanchi; Kevin Kane; Karthikeyan Sankaralingam (LCR, 2004)

TRIPS: A polymorphous architecture for exploiting ILP, TLP, and DLP. - Karthikeyan Sankaralingam; Ramadass Nagarajan; Haiming Liu 001; Changkyu Kim; Jaehyuk Huh 001; Nitya Ranganathan; Doug Burger; Stephen W. Keckler; Robert G. McDonald; Charles R. Moore (ACM Trans. Archit. Code Optim., 2004)

Distributed Microarchitectural Protocols in the TRIPS Prototype Processor. - Karthikeyan Sankaralingam; Ramadass Nagarajan; Robert G. McDonald; Rajagopalan Desikan; Saurabh Drolia; M. S. Govindan; Paul Gratz; Divya Gulati; Heather Hanson; Changkyu Kim; Haiming Liu 001; Nitya Ranganathan; et al. (MICRO, 2006)

Dataflow Predication. - Aaron Smith; Ramadass Nagarajan; Karthikeyan Sankaralingam; Robert G. McDonald; Doug Burger; Stephen W. Keckler; Kathryn S. McKinley (MICRO, 2006)

Implementing Signatures for Transactional Memory. - Daniel Sánchez 003; Luke Yen; Mark D. Hill; Karthikeyan Sankaralingam (MICRO, 2007)

Implementation and Evaluation of a Dynamically Routed Processor Operand Network. - Paul Gratz; Karthikeyan Sankaralingam; Heather Hanson; Premkishore Shivakumar; Robert G. McDonald; Stephen W. Keckler; Doug Burger (NOCS, 2007)

On-Chip Interconnection Networks of the TRIPS Chip. - Paul Gratz; Changkyu Kim; Karthikeyan Sankaralingam; Heather Hanson; Premkishore Shivakumar; Stephen W. Keckler; Doug Burger (IEEE Micro, 2007)

Toward a multicore architecture for real-time ray-tracing. - Venkatraman Govindaraju; Peter Djeu; Karthikeyan Sankaralingam; Mary K. Vernon; William R. Mark (MICRO, 2008)

Evaluating GPUs for network packet signature matching. - Randy Smith; Neelam Goyal; Justin Ormont; Karthikeyan Sankaralingam; Cristian Estan (ISPASS, 2009)

PLUG: flexible lookup modules for rapid deployment of new protocols in high-speed routers. - Lorenzo De Carli; Yi Pan; Amit Kumar 007; Cristian Estan; Karthikeyan Sankaralingam (SIGCOMM, 2009)

MapReduce for the Cell Broadband Engine Architecture. - Marc de Kruijf; Karthikeyan Sankaralingam (IBM J. Res. Dev., 2009)

Design and implementation of the PLUG architecture for programmable and efficient network lookups. - Amit Kumar 007; Lorenzo De Carli; Sung Jin Kim; Marc de Kruijf; Karthikeyan Sankaralingam; Cristian Estan; Somesh Jha (PACT, 2010)

A unified model for timing speculation: Evaluating the impact of technology scaling, CMOS design style, and fault recovery mechanism. - Marc de Kruijf; Shuou Nomura; Karthikeyan Sankaralingam (DSN, 2010)

Relax: an architectural framework for software recovery of hardware faults. - Marc de Kruijf; Shuou Nomura; Karthikeyan Sankaralingam (ISCA, 2010)

A fast and highly accurate path delay emulation framework for logic-emulation of timing speculation. - Shuou Nomura; Karthikeyan Sankaralingam; Ranganathan Sankaralingam (ITC, 2010)

Experiences in Co-designing a Packet Classification Algorithm and a Flexible Hardware Platform. - Nilay Vaish; Thawan Kooburat; Lorenzo De Carli; Karthikeyan Sankaralingam; Cristian Estan (ANCS, 2011)

Dynamically Specialized Datapaths for energy efficient computing. - Venkatraman Govindaraju; Chen-Han Ho; Karthikeyan Sankaralingam (HPCA, 2011)

Sampling + DMR: practical and low-overhead permanent fault detection. - Shuou Nomura; Matthew D. Sinclair; Chen-Han Ho; Venkatraman Govindaraju; Marc de Kruijf; Karthikeyan Sankaralingam (ISCA, 2011)

Idempotent processor architecture. - Marc de Kruijf; Karthikeyan Sankaralingam (MICRO, 2011)

Exploring the Interaction Between Device Lifetime Reliability and Security Vulnerabilities. - Chen-Han Ho; Garret Staus; Aaron Ullmer; Karu Sankaralingam (IEEE Comput. Archit. Lett., 2011)

LEAP: latency- energy- and area-optimized lookup pipeline. - Eric N. Harris; Samuel L. Wasmundt; Lorenzo De Carli; Karthikeyan Sankaralingam; Cristian Estan (ANCS, 2012)

Prototyping the DySER specialization architecture with OpenSPARC. - Jesse Benson; Ryan Cofell; Chris Frericks; Venkatraman Govindaraju; Chen-Han Ho; Zachary Marzec; Tony Nowatzki; Karu Sankaralingam (Hot Chips Symposium, 2012)

Design, integration and implementation of the DySER hardware accelerator into OpenSPARC. - Jesse Benson; Ryan Cofell; Chris Frericks; Chen-Han Ho; Venkatraman Govindaraju; Tony Nowatzki; Karthikeyan Sankaralingam (HPCA, 2012)

Mechanisms and Evaluation of Cross-Layer Fault-Tolerance for Supercomputing. - Chen-Han Ho; Marc de Kruijf; Karthikeyan Sankaralingam; Barry Rountree; Martin Schulz 001; Bronis R. de Supinski (ICPP, 2012)

iGPU: Exception support and speculative execution on GPUs. - Jaikrishnan Menon; Marc de Kruijf; Karthikeyan Sankaralingam (ISCA, 2012)

Static analysis and compiler design for idempotent processing. - Marc de Kruijf; Karthikeyan Sankaralingam; Somesh Jha (PLDI, 2012)

Dark Silicon and the End of Multicore Scaling. - Hadi Esmaeilzadeh; Emily R. Blem; Renée St. Amant; Karthikeyan Sankaralingam; Doug Burger (IEEE Micro, 2012)

DySER: Unifying Functionality and Parallelism Specialization for Energy-Efficient Computing. - Venkatraman Govindaraju; Chen-Han Ho; Tony Nowatzki; Jatin Chhugani; Nadathur Satish; Karthikeyan Sankaralingam; Changkyu Kim (IEEE Micro, 2012)

Power Limitations and Dark Silicon Challenge the Future of Multicore. - Hadi Esmaeilzadeh; Emily R. Blem; Renée St. Amant; Karthikeyan Sankaralingam; Doug Burger (ACM Trans. Comput. Syst., 2012)

Breaking SIMD shackles with an exposed flexible microarchitecture and the access execute PDG. - Venkatraman Govindaraju; Tony Nowatzki; Karthikeyan Sankaralingam (PACT, 2013)

SWSL: SoftWare Synthesis for network Lookup. - Sung Jin Kim; Lorenzo De Carli; Karthikeyan Sankaralingam; Cristian Estan (ANCS, 2013)

ConAir: featherweight concurrency bug recovery via single-threaded idempotent execution. - Wei Zhang 022; Marc de Kruijf; Ang Li; Shan Lu 001; Karthikeyan Sankaralingam (ASPLOS, 2013)

Dynamic hardware specialization-using moore's bounty without burning the chip down. - Karthikeyan Sankaralingam (CASES, 2013)

Idempotent code generation: Implementation, analysis, and evaluation. - Marc de Kruijf; Karthikeyan Sankaralingam (CGO, 2013)

Power struggles: Revisiting the RISC vs. CISC debate on contemporary ARM and x86 architectures. - Emily R. Blem; Jaikrishnan Menon; Karthikeyan Sankaralingam (HPCA, 2013)

Virtually-aged sampling DMR: unifying circuit failure prediction and circuit failure detection. - Raghuraman Balasubramanian; Karthikeyan Sankaralingam (MICRO, 2013)

A general constraint-centric scheduling framework for spatial architectures. - Tony Nowatzki; Michael Sartin-Tarm; Lorenzo De Carli; Karthikeyan Sankaralingam; Cristian Estan; Behnam Robatmili (PLDI, 2013)

Power challenges may end the multicore era. - Hadi Esmaeilzadeh; Emily R. Blem; Renée St. Amant; Karthikeyan Sankaralingam; Doug Burger (Commun. ACM, 2013)

Multicore Model from Abstract Single Core Inputs. - Emily R. Blem; Hadi Esmaeilzadeh; Renée St. Amant; Karthikeyan Sankaralingam; Doug Burger (IEEE Comput. Archit. Lett., 2013)

Constraint centric scheduling guide. - Michael Sartin-Tarm; Tony Nowatzki; Lorenzo De Carli; Karthikeyan Sankaralingam; Cristian Estan (SIGARCH Comput. Archit. News, 2013)

Optimization and Mathematical Modeling in Computer Architecture - Tony Nowatzki; Michael C. Ferris; Karu Sankaralingam; Cristian Estan; Nilay Vaish; David A. Wood 001 (Morgan & Claypool Publishers, 2013)

Memory processing units. - Jaikrishnan Menon; Lorenzo De Carli; Vijayraghavan Thiruvengadam; Karthikeyan Sankaralingam; Cristian Estan (Hot Chips Symposium, 2014)

Understanding the impact of gate-level physical reliability effects on whole program execution. - Raghuraman Balasubramanian; Karthikeyan Sankaralingam (HPCA, 2014)

Hands-on introduction to computer science at the freshman level. - Raghuraman Balasubramanian; Zachary York; Matthew Doran; Aritra Biswas; Timur Girgin; Karthikeyan Sankaralingam (SIGCSE, 2014)

A Scheduling Framework for Spatial Architectures Across Multiple Constraint-Solving Theories. - Tony Nowatzki; Michael Sartin-Tarm; Lorenzo De Carli; Karthikeyan Sankaralingam; Cristian Estan; Behnam Robatmili (ACM Trans. Program. Lang. Syst., 2014)

MIAOW - An open source RTL implementation of a GPGPU. - Raghuraman Balasubramanian; Vinay Gangadhar; Ziliang Guo; Chen-Han Ho; Cherin Joseph; Jaikrishnan Menon; Mario Paulo Drumond; Robin Paul; Sharath Prasad; Pradip Valathol; Karthikeyan Sankaralingam (COOL Chips, 2015)

MIAOW: An open source GPGPU. - Vinay Gangadhar; Raghuraman Balasubramanian; Mario Drumond; Ziliang Guo; Jai Menon 003; Cherin Joseph; Robin Prakash; Sharath Prasad; Pradip Vallathol; Karu Sankaralingam (Hot Chips Symposium, 2015)

Efficient execution of memory access phases using dataflow specialization. - Chen-Han Ho; Sung Jin Kim; Karthikeyan Sankaralingam (ISCA, 2015)

Exploring the potential of heterogeneous von neumann/dataflow execution models. - Tony Nowatzki; Vinay Gangadhar; Karthikeyan Sankaralingam (ISCA, 2015)

Performance evaluation of a DySER FPGA prototype system spanning the compiler, microarchitecture, and hardware implementation. - Chen-Han Ho; Venkatraman Govindaraju; Tony Nowatzki; Ranjini Nagaraju; Zachary Marzec; Preeti Agarwal; Chris Frericks; Ryan Cofell; Karthikeyan Sankaralingam (ISPASS, 2015)

Cross-architecture performance prediction (XAPP) using CPU code to predict GPU performance. - Newsha Ardalani; Clint Lestourgeon; Karthikeyan Sankaralingam; Xiaojin Zhu 001 (MICRO, 2015)

A Graph-Based Program Representation for Analyzing Hardware Specialization Approaches. - Tony Nowatzki; Venkatraman Govindaraju; Karthikeyan Sankaralingam (IEEE Comput. Archit. Lett., 2015)

Fixing, preventing, and recovering from concurrency bugs. - Dongdong Deng; Guoliang Jin; Marc de Kruijf; Ang Li; Ben Liblit; Shan Lu 001; Shanxiang Qi; Jinglei Ren; Karthikeyan Sankaralingam; Linhai Song; Yongwei Wu 001; Mingxing Zhang; et al. (Sci. China Inf. Sci., 2015)

Architectural Simulators Considered Harmful. - Tony Nowatzki; Jaikrishnan Menon; Chen-Han Ho; Karthikeyan Sankaralingam (IEEE Micro, 2015)

Comprehensive Circuit Failure Prediction for Logic and SRAM Using Virtual Aging. - Amir Yazdanbakhsh; Raghuraman Balasubramanian; Tony Nowatzki; Karthikeyan Sankaralingam (IEEE Micro, 2015)

Enabling GPGPU Low-Level Hardware Explorations with MIAOW: An Open-Source RTL Implementation of a GPGPU. - Raghuraman Balasubramanian; Vinay Gangadhar; Ziliang Guo; Chen-Han Ho; Cherin Joseph; Jaikrishnan Menon; Mario Paulo Drumond; Robin Paul; Sharath Prasad; Pradip Valathol; Karthikeyan Sankaralingam (ACM Trans. Archit. Code Optim., 2015)

ISA Wars: Understanding the Relevance of ISA being RISC or CISC to Performance, Power, and Energy on Modern Architectures. - Emily R. Blem; Jaikrishnan Menon; Thiruvengadam Vijayaraghavan; Karthikeyan Sankaralingam (ACM Trans. Comput. Syst., 2015)

Analyzing Behavior Specialized Acceleration. - Tony Nowatzki; Karthikeyan Sankaralingam (ASPLOS, 2016)

Modularizing the microprocessor core to outperform traditional out-of-order. - Tony Nowatzki; Karthikeyan Sankaralingam (Hot Chips Symposium, 2016)

Pushing the limits of accelerator efficiency while retaining programmability. - Tony Nowatzki; Vinay Gangadhar; Karthikeyan Sankaralingam; Greg Wright (HPCA, 2016)

Open-source Hardware: Opportunities and Challenges. - Gagan Gupta 003; Tony Nowatzki; Vinay Gangadhar; Karthikeyan Sankaralingam (CoRR, 2016)

Near-Memory Data Services. - Babak Falsafi; Mircea Stan; Kevin Skadron; Nuwan Jayasena; Yunji Chen; Jinhua Tao; Ravi Nair; Jaime H. Moreno; Naveen Muralimanohar; Karthikeyan Sankaralingam; Cristian Estan (IEEE Micro, 2016)

Accelerating the Accelerator Memory Interface with Access-Execute and Dataflow. - Chen-Han Ho; Sung Jin Kim; Karthikeyan Sankaralingam (IEEE Micro, 2016)

A Heterogeneous Von Neumann/Explicit Dataflow Processor. - Tony Nowatzki; Vinay Gangadhar; Karthikeyan Sankaralingam (IEEE Micro, 2016)

Stream-Dataflow Acceleration. - Tony Nowatzki; Vinay Gangadhar; Newsha Ardalani; Karthikeyan Sankaralingam (ISCA, 2017)

Kickstarting Semiconductor Innovation with Open Source Hardware. - Gagan Gupta 003; Tony Nowatzki; Vinay Gangadhar; Karthikeyan Sankaralingam (Computer, 2017)

Democratizing Design for Future Computing Platforms. - Luis Ceze; Mark D. Hill; Karthikeyan Sankaralingam; Thomas F. Wenisch (CoRR, 2017)

Domain Specialization Is Generally Unnecessary for Accelerators. - Tony Nowatzki; Vinay Gangadhar; Karthikeyan Sankaralingam; Greg Wright (IEEE Micro, 2017)

Hybrid optimization/heuristic instruction scheduling for programmable accelerator codesign. - Tony Nowatzki; Newsha Ardalani; Karthikeyan Sankaralingam; Jian Weng 002 (PACT, 2018)

Applying Hardware Transactional Memory for Concurrency-Bug Failure Recovery in Production Runs. - Yuxi Chen; Shu Wang; Shan Lu 001; Karthikeyan Sankaralingam (USENIX ATC, 2018)

MPU-BWM: Accelerating Sequence Alignment. - Thiruvengadam Vijayaraghavan; Amit Rajesh; Karthikeyan Sankaralingam (IEEE Comput. Archit. Lett., 2018)

Heterogeneous Von Neumann/dataflow microprocessors. - Tony Nowatzki; Vinay Gangadhar; Karthikeyan Sankaralingam (Commun. ACM, 2019)

A Static Analysis-based Cross-Architecture Performance Prediction Using Machine Learning. - Newsha Ardalani; Urmish Thakker; Aws Albarghouthi; Karu Sankaralingam (CoRR, 2019)

Applying Transactional Memory for Concurrency-Bug Failure Recovery in Production Runs. - Yuxi Chen; Shu Wang; Shan Lu 001; Karthikeyan Sankaralingam (IEEE Trans. Parallel Distributed Syst., 2019)

Mozart: Designing for Software Maturity and the Next Paradigm for Chip Architectures. - Karu Sankaralingam; Tony Nowatzki; Greg Wright; Poly Palamuttam; Jitu Khare; Vinay Gangadhar; Preyas Shah (HCS, 2021)

Understanding the Limits of Conventional Hardware Architectures for Deep-Learning. - Michael Davies; Adam Labiosa; Karthikeyan Sankaralingam (CoRR, 2021)

The Mozart reuse exposed dataflow processor for AI and beyond: industrial product. - Karthikeyan Sankaralingam; Tony Nowatzki; Vinay Gangadhar; Preyas Shah; Michael Davies; William Galliher; Ziliang Guo; Jitu Khare; Deepak Vijay; Poly Palamuttam; Maghawan Punde; Alex Tan; et al. (ISCA, 2022)

LookupFFN: Making Transformers Compute-lite for CPU inference. - Zhanpeng Zeng; Michael Davies; Pranav Pulijala; Karthikeyan Sankaralingam; Vikas Singh (ICML, 2023)

BRYT: Data Rich Analytics Based Computer Architecture for A New Paradigm of Chip Design to Supplant Moore's Law. - Ian McDougall; Shayne Wadle; Harish Batchu; Michael Davies; Karthikeyan Sankaralingam (CoRR, 2023)

A Journey of a 1, 000 Kernels Begins with a Single Step: A Retrospective of Deep Learning on GPUs. - Michael Davies; Ian McDougall; Selvaraj Anandaraj; Deep Machchhar; Rithik Jain; Karthikeyan Sankaralingam (ASPLOS (2), 2024)

WASP: Exploiting GPU Pipeline Parallelism with Hardware-Accelerated Automatic Warp Specialization. - Neal Clayton Crago; Sana Damani; Karthikeyan Sankaralingam; Stephen W. Keckler (HPCA, 2024)

IM-Unpack: Training and Inference with Arbitrarily Low Precision Integers. - Zhanpeng Zeng; Karthikeyan Sankaralingam; Vikas Singh (ICML, 2024)

A Whimsical Odyssey Through the Maze of Scholarly Reviews. - Karu Sankaralingam (Commun. ACM, 2024)

Kitsune: Enabling Dataflow Execution on GPUs. - Michael Davies; Neal Clayton Crago; Karthikeyan Sankaralingam; Stephen W. Keckler (CoRR, 2025)

An Evaluation of N-Gram Selection Strategies for Regular Expression Indexing in Contemporary Text Analysis Tasks. - Ling Zhang; Shaleen Deep; Jignesh M. Patel; Karthikeyan Sankaralingam (CoRR, 2025)

Defying Moore: Envisioning the Economics of a Semiconductor Revolution through 12nm Specialization. - Michael Davies; Karthikeyan Sankaralingam (Commun. ACM, 2025)

Efficient LLM Inference: Bandwidth, Compute, Synchronization, and Capacity are all you need. - Michael Davies; Neal Clayton Crago; Karthikeyan Sankaralingam; Christos Kozyrakis (CoRR, 2025)