A 2.4Gbps-4.8Gbps XDR-DRAM I/O (XIO) Link. - Vijay Khawshe; Kapil Vyas; Renu Rangnekar; Prateek Goyal; Vijay Krishna; Kashinath Prabhu; Pravin Kumar Venkatesan; Leneesh Raghavan; Rajkumar Palwai; M. Thrivikraman; Kunal Desai; Abhijit Abhyankar (VLSI Design, 2009)

A 6.4/3.2/1.6 Gb/s low power interface with all digital clock multiplier for on-the-fly rate switching. - Masum Hossain; Kambiz Kaviani; Barry Daly; Makarand Shirasgaonkar; Wayne D. Dettloff; Teva Stone; Kashinath Prabhu; Brian Tsang; John C. Eble; Jared Zerbe (CICC, 2012)

A 6.4Gb/s near-ground single-ended transceiver for dual-rank DIMM memory interface systems. - Kambiz Kaviani; Michael Bucher; Bruce Su; Barry Daly; Bill Stonecypher; Wayne D. Dettloff; Teva Stone; Kashinath Prabhu; Pravin Kumar Venkatesan; Fred Heaton; Ravi T. Kollipara; Yi Lu; et al. (ISSCC, 2013)

A 6.4-Gb/s Near-Ground Single-Ended Transceiver for Dual-Rank DIMM Memory Interface Systems. - Michael Bucher; Ravi T. Kollipara; Bruce Su; Liji Gopalakrishnan; Kashinath Prabhu; Pravin Kumar Venkatesan; Kambiz Kaviani; Barry Daly; William F. Stonecypher; Wayne D. Dettloff; Teva Stone; Fred Heaton; et al. (IEEE J. Solid State Circuits, 2014)