Creating an Agile Hardware Design Flow. - Rick Bahr; Clark W. Barrett; Nikhil Bhagdikar; Alex Carsello; Ross Daly; Caleb Donovick; David Durst; Kayvon Fatahalian; Kathleen Feng; Pat Hanrahan; Teguh Hofstee; Mark Horowitz; et al. (DAC, 2020)

Automated Design Space Exploration of CGRA Processing Element Architectures using Frequent Subgraph Analysis. - Jackson Melchert; Kathleen Feng; Caleb Donovick; Ross Daly; Clark W. Barrett; Mark Horowitz; Pat Hanrahan; Priyanka Raina (CoRR, 2021)

Compiling Halide Programs to Push-Memory Accelerators. - Qiaoyi Liu; Dillon Huff; Jeff Setter; Maxwell Strange; Kathleen Feng; Kavya Sreedhar; Ziheng Wang; Keyi Zhang; Mark Horowitz; Priyanka Raina; Fredrik Kjolstad (CoRR, 2021)

Amber: Coarse-Grained Reconfigurable Array-Based SoC for Dense Linear Algebra Acceleration. - Kathleen Feng; Alex Carsello; Taeyoung Kong; Kalhan Koul; Qiaoyi Liu; Jackson Melchert; Gedeon Nyengele; Maxwell Strange; Keyi Zhang; Ankita Nayak; Jeff Setter; James Thomas 003; et al. (HCS, 2022)

Amber: A 367 GOPS, 538 GOPS/W 16nm SoC with a Coarse-Grained Reconfigurable Array for Flexible Acceleration of Dense Linear Algebra. - Alex Carsello; Kathleen Feng; Taeyoung Kong; Kalhan Koul; Qiaoyi Liu; Jackson Melchert; Gedeon Nyengele; Maxwell Strange; Keyi Zhang; Ankita Nayak; Jeff Setter; James Thomas 003; et al. (VLSI Technology and Circuits, 2022)

APEX: A Framework for Automated Processing Element Design Space Exploration using Frequent Subgraph Analysis. - Jackson Melchert; Kathleen Feng; Caleb Donovick; Ross Daly; Ritvik Sharma; Clark W. Barrett; Mark A. Horowitz; Pat Hanrahan; Priyanka Raina (ASPLOS (3), 2023)

AHA: An Agile Approach to the Design of Coarse-Grained Reconfigurable Accelerators and Compilers. - Kalhan Koul; Jackson Melchert; Kavya Sreedhar; Leonard Truong; Gedeon Nyengele; Keyi Zhang; Qiaoyi Liu; Jeff Setter; Po-Han Chen; Yuchen Mei; Maxwell Strange; Ross Daly; et al. (ACM Trans. Embed. Comput. Syst., 2023)

Unified Buffer: Compiling Image Processing and Machine Learning Applications to Push-Memory Accelerators. - Qiaoyi Liu; Jeff Setter; Dillon Huff; Maxwell Strange; Kathleen Feng; Mark Horowitz; Priyanka Raina; Fredrik Kjolstad (ACM Trans. Archit. Code Optim., 2023)

Amber: A 16-nm System-on-Chip With a Coarse- Grained Reconfigurable Array for Flexible Acceleration of Dense Linear Algebra. - Kathleen Feng; Taeyoung Kong; Kalhan Koul; Jackson Melchert; Alex Carsello; Qiaoyi Liu; Gedeon Nyengele; Maxwell Strange; Keyi Zhang; Ankita Nayak; Jeff Setter; James Thomas 003; et al. (IEEE J. Solid State Circuits, 2024)

Aspen: A 630 FPS Real-Time Posit-Based Unified Accelerator for Extended Reality Perception Workloads. - Kathleen Feng; Kartik Prabhu; Kai Bartolone; Jeffrey Yu; Priyanka Raina (CICC, 2025)