Circuit implementation of a 600 MHz superscalar RISC microprocessor. - Mark Matson; Dan Bailey; Shane L. Bell; Larry L. Biro; Steve Butler; John Clouser; Jim Farrell; Mike Gowan; Donald A. Priore; Kathryn Wilcox (ICCD, 1998)

Design solutions for the Bulldozer 32nm SOI 2-core processor module in an 8-core CPU. - Tim C. Fischer; Srikanth Arekapudi; Eric Busta; Carl Dietz; Michael Golden; Scott Hilker; Aaron Horiuchi; Kevin A. Hurd; Dave Johnson 002; Hugh McIntyre; Samuel Naffziger; James Vinh; et al. (ISSCC, 2011)

5.5 Steamroller: An x86-64 core implemented in 28nm bulk CMOS. - Kevin Gillespie; Harry R. Fair III; Carson Henrion; Ravi Jotwani; Stephen V. Kosonocky; Robert S. Orefice; Donald A. Priore; Jonathan White; Kathryn Wilcox (ISSCC, 2014)

EP1: Moore's law challenges below 10nm: Technology, design and economic implications. - Bing Sheu; Kathy Wilcox; Ali M. Keshavarzi; Dimitri A. Antoniadis (ISSCC, 2015)

F4: Building the Internet of Everything (IoE): Low-power techniques at the circuit and system levels. - Marian Verhelst; Dennis Sylvester; Makoto Takamiya; Mike Clinton; Kathy Wilcox; Koichi Nose (ISSCC, 2015)

4.8 A 28nm x86 APU optimized for power and area efficiency. - Kathryn Wilcox; David Akeson; Harry R. Fair III; Jim Farrell; Dave Johnson 002; Guhan Krishnan; Hugh McIntyre; Edward McLellan; Samuel Naffziger; Russell Schreiber; Sriram Sundaram; Jonathan White (ISSCC, 2015)

Steamroller Module and Adaptive Clocking System in 28 nm CMOS. - Kathryn Wilcox; Robert Cole; Harry R. Fair III; Kevin Gillespie; Aaron Grenat; Carson Henrion; Ravi Jotwani; Stephen Kosonocky; Benjamin Munger; Samuel Naffziger; Robert S. Orefice; Sanjay Pant; et al. (IEEE J. Solid State Circuits, 2015)

Session 19 overview: Digital PLLs. - John Maneatis; Kathy Wilcox (ISSCC, 2016)

Carrizo: A High Performance, Energy Efficient 28 nm APU. - Benjamin Munger; David Akeson; Srikanth Arekapudi; Tom Burd; Harry R. Fair III; Jim Farrell; Dave Johnson 002; Guhan Krishnan; Hugh McIntyre; Edward McLellan; Samuel Naffziger; Russell Schreiber; et al. (IEEE J. Solid State Circuits, 2016)

Session 26 overview: Processor-power management and clocking. - Kathy Wilcox; Youngmin Shin; Edith Beigné (ISSCC, 2017)

SE2: Going Remote: Challenges and Opportunities to Remote Learning, Work, and Collaboration. - Alicia Klinefelter; Huichu Liu; Luca Benini; Yvain Thonnart; Keith A. Bowman; Kathy Wilcox; David Bol; Alvin Loke; Ofer Shacham (ISSCC, 2021)

SE4: ICs in PandemICs. - Negar Reiskarimian; Zeynep Toprak Deniz; Ulkuhan Guler 001; Kathy Wilcox; Alice Wang; Jane Gu; Yaoyao Jia; Alicia Klinefelter; Rikky Muller; Farhana Sheikh; Yildiz Sinangil; Trudy Stetzler; et al. (ISSCC, 2021)

"Zen 4": The AMD 5nm 5.7GHz x86-64 Microprocessor Core. - Benjamin Munger; Kathy Wilcox; Jeshuah Sniderman; Chuck Tung; Brett Johnson; Russell Schreiber; Carson Henrion; Kevin Gillespie; Tom Burd; Harry R. Fair III; Dave Johnson 002; Jonathan White; et al. (ISSCC, 2023)