WS2 transistors on 300 mm wafers with BEOL compatibility. - Tom Schram; Quentin Smets; Benjamin Groven; M. H. Heyne; E. Kunnen; A. Thiam; Katia Devriendt; Annelies Delabie; Dennis Lin; M. Lux; Daniele Chiappe; I. Asselberghs; et al. (ESSDERC, 2017)

Sequential 3D: Key integration challenges and opportunities for advanced semiconductor scaling. - A. Vandooren; Liesbeth Witters; Jacopo Franco; Arindam Mallik; Bertrand Parvais; Z. Wu; Amey Walke; V. Deshpande; E. Rosseel; Andriy Hikavyy; W. Li; L. Peng; et al. (ICICDT, 2018)

Process-induced charging damage in IGZO nTFTs. - Gaspard Hiblot; Nouredine Rassoul; Lieve Teugels; Katia Devriendt; Adrian Vaisman Chasin; Michiel J. van Setten; Attilio Belmonte; Romain Delhougne; Gouri Sankar Kar (IRPS, 2021)

Scaled FinFETs Connected by Using Both Wafer Sides for Routing via Buried Power Rails. - Anabela Veloso; Anne Jourdain; D. Radisic; Rongmei Chen; G. Arutchelvan; B. O'Sullivan; Hiroaki Arimura; Michele Stucchi; An De Keersgieter; M. Hosseini; T. Hopf; K. D'Have; et al. (VLSI Technology and Circuits, 2022)

Monolithic Complementary Field Effect Transistors (CFET) Demonstrated using Middle Dielectric Isolation and Stacked Contacts. - Steven Demuynck; Victor Vega-Gonzalez; C. Toledo de Carvalho Cavalcante; L. Petersen Barbosa Lima; K. Stiers; C. Sheng; A. Vandooren; M. Hosseini; X. Zhou; Hans Mertens; Thomas Chiarella; Jürgen Bömmels; et al. (VLSI Technology and Circuits, 2024)