A Decentralized controlled multi-processor system based on the data-driven scheme. - Hiroaki Nishikawa; Katsuhiko Asada; Hiroaki Terada (ICDCS, 1982)

A data-driven execution control scheme and its experimental study. - Hiroaki Nishikawa; Katsuhiko Asada; Hiroaki Terada (Syst. Comput. Jpn., 1985)

VLSI design of a one-chip data-driven processor: Q-v1. - Hiroaki Terada; Hiroaki Nishikawa; Katsuhiko Asada; Satoshi Matsumoto; Souichi Miyata (FJCC, 1987)

Hardware Structure of a One-Chip Data Driven Processor: Q-p. - Katsuhiko Asada; Hiroaki Terada; Satoshi Matsumoto; Souichi Miyata; Hajime Asano; Hiroki Miura; Masahisa Shimizu; Shinji Komori; Takeshi Fukuhara; Kenji Shima (ICPP, 1987)

An elastic pipeline mechanism by self-timed circuits. - Shinji Komori; Hidehiro Takata; Toshiyuki Tamura; Fumiyasu Asai; Takio Ohno; Osamu Tomisawa; Tetsuo Yamasaki; Kenji Shima; Katsuhiko Asada; Hiroaki Terada (IEEE J. Solid State Circuits, 1988)

Data-driven architecture based on pipelined thread processing. - Tohru Saitoh; Katsuhiko Asada (Syst. Comput. Jpn., 1997)