A cost effective D-TV system chip set. - Yoshikazu Mihara; Katsunori Hirase; Minoru Tanaka (IEEE Trans. Consumer Electron., 1999)

A Reconfigurable Processor Based on ALU Array Architecture with Limitation on the Interconnection. - Makoto Okada; Tatsuo Hiramatsu; Hiroshi Nakajima; Makoto Ozone; Katsunori Hirase; Shinji Kimura (IPDPS, 2005)

Reconfigurable Processor LSI Based on ALU Array with Limitations of Connections of ALUs for Software Radio. - Makoto Ozone; Tatsuo Hiramatsu; Katsunori Hirase; Kazuhisa Iizuka (ITNG, 2009)

Reconfigurable processor based on ALU array architecture for software radio. - Makoto Ozone; Tatsuo Hiramatsu; Katsunori Hirase; Kazuhisa Iizuka; Shin-ichiro Tomisawa (Int. J. High Perform. Syst. Archit., 2011)