Two-Dimensional Layout Synthesis for Large-Scale CMOS Circuits. - Katsunori Tani; Kyoichi Izumi; Masahiko Kashimura; Tsuneo Matsuda; Takashi Fujii (ICCAD, 1991)

On area-efficient drawings of rectangular duals for VLSI floor-plan. - Katsunori Tani; Shuji Tsukiyama; Shoji Shinoda; Isao Shirakawa (Math. Program., 1991)

A robust min-cut improvement algorithm based on dynamic look-ahead weighting. - Katsunori Tani (ASP-DAC, 1995)