Test cost reduction by at-speed BISR for embedded DRAMs. - Yoshihiro Nagura; Michael Mullins; Anthony Sauvageau; Yoshinoro Fujiwara; Katsuya Furue; Ryuji Ohmura; Tatsunori Komoike; Takenori Okitaka; Tetsushi Tanizaki; Katsumi Dosaka; Kazutami Arimoto; Yukiyoshi Koda; et al. (ITC, 2001)

On-Chip Optical Interconnect. - Keishi Ohashi; Kenichi Nishi; Takanori Shimizu; Masafumi Nakada; Junichi Fujikata; Jun Ushida; Sunao Torii; Koichi Nose; Masayuki Mizuno; Hiroaki Yukawa; Masao Kinoshita; Nobuo Suzuki; et al. (Proc. IEEE, 2009)