A VLIW Vector Media Coprocessor With Cascaded SIMD ALUs. - Takahisa Wada; Shunichi Ishiwata; Katsuyuki Kimura; Keiri Nakanishi; Masato Sumiyoshi; Takashi Miyamori; Masaki Nakagawa (IEEE Trans. Very Large Scale Integr. Syst., 2009)

A 464GOPS 620GOPS/W heterogeneous multi-core SoC for image-recognition applications. - Yasuki Tanabe; Masato Sumiyoshi; Manabu Nishiyama; Itaru Yamazaki; Shinsuke Fujii; Katsuyuki Kimura; Takuma Aoyama; Moriyasu Banno; Hiroo Hayashi; Takashi Miyamori (ISSCC, 2012)

Bisimilarity enforcing supervisory control of nondeterministic systems under event and state observations. - Katsuyuki Kimura; Masashi Nomura; Shigemasa Takai (WODES, 2012)

Bisimilarity Control of Nondeterministic Discrete Event Systems under Event and State Observations. - Katsuyuki Kimura; Shigemasa Takai (IEICE Trans. Inf. Syst., 2014)

Maximally Permissive Similarity Enforcing Supervisors for Nondeterministic Discrete Event Systems under Event and State Observations. - Katsuyuki Kimura; Shigemasa Takai (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2014)

A 20ch TDC/ADC hybrid SoC for 240×96-pixel 10%-reflection <0.125%-precision 200m-range imaging LiDAR with smart accumulation technique. - Kentaro Yoshioka; Hiroshi Kubota; Tomonori Fukushima; Satoshi Kondo; Tuan Thanh Ta; Hidenori Okuni; Kaori Watanabe; Yoshinari Ojima; Katsuyuki Kimura; Sohichiroh Hosoda; Yutaka Ota; Tomohiro Koizumi; et al. (ISSCC, 2018)

A 20-ch TDC/ADC Hybrid Architecture LiDAR SoC for 240 × 96 Pixel 200-m Range Imaging With Smart Accumulation Technique and Residue Quantizing SAR ADC. - Kentaro Yoshioka; Hiroshi Kubota; Tomonori Fukushima; Satoshi Kondo; Tuan Thanh Ta; Hidenori Okuni; Kaori Watanabe; Masatoshi Hirono; Yoshinari Ojima; Katsuyuki Kimura; Sohichiroh Hosoda; Yutaka Ota; et al. (IEEE J. Solid State Circuits, 2018)

A 20.5TOPS and 217.3GOPS/mm2 Multicore SoC with DNN Accelerator and Image Signal Processor Complying with ISO26262 for Automotive Applications. - Yutaka Yamada; Toru Sano; Yasuki Tanabe; Yutaro Ishigaki; Soichiro Hosoda; Fumihiko Hyuga; Akira Moriya; Ryuji Hada; Atsushi Masuda; Masato Uchiyama; Tomohiro Koizumi; Takanori Tamai; et al. (ISSCC, 2019)

5.1 A 240×192 Pixel 10fps 70klux 225m-Range Automotive LiDAR SoC Using a 40ch 0.0036mm2 Voltage/Time Dual-Data-Converter-Based AFE. - Satoshi Kondo; Hiroshi Kubota; Hisaaki Katagiri; Yutaka Ota; Masatoshi Hirono; Tuan Thanh Ta; Hidenori Okuni; Shinichi Ohtsuka; Yoshinari Ojima; Tomohiko Sugimoto; Hirotomo Ishii; Kentaro Yoshioka; et al. (ISSCC, 2020)

A 2D-SPAD Array and Read-Out AFE for Next-Generation Solid-State LiDAR. - Tuan Thanh Ta; Hiroshi Kubota; Koichi Kokubun; Toshiki Sugimoto; Masatoshi Hirono; Mitsuhiro Sengoku; Hisaaki Katagiri; Hidenori Okuni; Satoshi Kondo; Shinichi Ohtsuka; Honam Kwon; Keita Sasaki; et al. (VLSI Circuits, 2020)

An Automotive LiDAR SoC for 240 × 192-Pixel 225-m-Range Imaging With a 40-Channel 0.0036-mm2 Voltage/Time Dual-Data-Converter-Based AFE. - Satoshi Kondo; Hiroshi Kubota; Hisaaki Katagiri; Yutaka Ota; Masatoshi Hirono; Tuan Thanh Ta; Hidenori Okuni; Shinichi Ohtsuka; Yoshinari Ojima; Tomohiko Sugimoto; Hirotomo Ishii; Kentaro Yoshioka; et al. (IEEE J. Solid State Circuits, 2020)

A 20.5 TOPS Multicore SoC With DNN Accelerator and Image Signal Processor for Automotive Applications. - Yutaka Yamada; Masato Uchiyama; Masashi Jobashi; Tomohiro Koizumi; Takanori Tamai; Nobuhiro Sato; Jun Tanabe; Katsuyuki Kimura; Yoshinari Ojima; Ryusuke Murakami; Takashi Yoshikawa; Toru Sano; et al. (IEEE J. Solid State Circuits, 2020)

1200x84-pixels 30fps 64cc Solid-State LiDAR RX with an HV/LV transistors Hybrid Active-Quenching-SPAD Array and Background Digital PT Compensation. - Toshiki Sugimoto; Tuan Thanh Ta; Koichi Kokubun; Satoshi Kondo; Tetsuro Itakura; Hisaaki Katagiri; Yutaka Ota; Mitsuhiro Sengoku; Honam Kwon; Keita Sasaki; Hiroshi Kubota; Kazuhiro Suzuki; et al. (VLSI Technology and Circuits, 2022)