Flex-Pass-Gate SRAM Design for Static Noise Margin Enhancement Using FinFET-Based Technology. - Shin-ichi O'Uchi; Meishoku Masahara; Kunihiro Sakamoto; Kazuhiko Endo; Yongxun Liu; Takashi Matsukawa; Toshihiro Sekigawa; Hanpei Koike; Eiichi Suzuki (CICC, 2007)

FinFET-Based Flex-Vth SRAM Design for Drastic Standby-Leakage-Current Reduction. - Shin-ichi O'Uchi; Meishoku Masahara; Kazuhiko Endo; Yongxun Liu; Takashi Matsukawa; Kunihiro Sakamoto; Toshihiro Sekigawa; Hanpei Koike; Eiichi Suzuki (IEICE Trans. Electron., 2008)

Variability analysis of FinFET-based devices and circuits considering electrical confinement and width quantization. - Seid Hadi Rasouli; Kazuhiko Endo; Kaustav Banerjee (ICCAD, 2009)

Realization of 0.7-V analog circuits by adaptive-Vt operation of FinFET. - Shin-ichi O'Uchi; Kazuhiko Endo; Yongxun Liu; Tadashi Nakagawa; Takashi Matsukawa; Yuki Ishikawa; Junichi Tsukada; Toshihiro Sekigawa; Hanpei Koike; Kunihiro Sakamoto; Meishoku Masahara (CICC, 2010)

0.5V FinFET SRAM with dynamic threshold control of pass gates for salvaging malfunctioned bits. - Shin-ichi O'Uchi; Kazuhiko Endo; Yongxun Liu; Tadashi Nakagawa; Takashi Matsukawa; Yuki Ishikawa; Junichi Tsukada; Hiromi Yamauchi; Toshihiro Sekigawa; Hanpei Koike; Kunihiro Sakamoto; Meishoku Masahara (ESSCIRC, 2010)

Work-function variation induced fluctuation in bias-temperature-instability characteristics of emerging metal-gate devices and implications for digital design. - Seid Hadi Rasouli; Kazuhiko Endo; Kaustav Banerjee (ICCAD, 2010)

A 0.7-V Opamp in Scaled Low-Standby-Power FinFET Technology. - Shin-ichi O'Uchi; Kazuhiko Endo; Takashi Matsukawa; Yongxun Liu; Tadashi Nakagawa; Yuki Ishikawa; Junichi Tsukada; Hiromi Yamauchi; Toshihiro Sekigawa; Hanpei Koike; Kunihiro Sakamoto; Meishoku Masahara (IEICE Trans. Electron., 2012)

High-Frequency Precise Characterization of Intrinsic FinFET Channel. - Hideo Sakai; Shin-ichi O'Uchi; Takashi Matsukawa; Kazuhiko Endo; Yongxun Liu; Junichi Tsukada; Yuki Ishikawa; Tadashi Nakagawa; Toshihiro Sekigawa; Hanpei Koike; Kunihiro Sakamoto; Meishoku Masahara; et al. (IEICE Trans. Electron., 2012)

Guidelines for symmetric threshold voltage in tunnel FinFETs with single and dual metal gate electrodes. - Wataru Mizubayashi; Koichi Fukuda; Takahiro Mori; Kazuhiko Endo; Yongxun Liu; Takashi Matsukawa; Shin-ichi O'Uchi; Yuki Ishikawa; Shinji Migita; Yukinori Morita; Akihito Tanabe; Junichi Tsukada; et al. (ESSDERC, 2013)

Performance limit of parallel electric field tunnel FET and improvement by modified gate and channel configurations. - Yukinori Morita; Takahiro Mori; Shinji Migita; Wataru Mizubayashi; Akihito Tanabe; Koichi Fukuda; Takashi Matsukawa; Kazuhiko Endo; Shin-ichi O'Uchi; Yongxun Liu; Meishoku Masahara; Hiroyuki Ota (ESSDERC, 2013)

Independent-Double-Gate FinFET SRAM Technology. - Kazuhiko Endo; Shin-ichi O'Uchi; Takashi Matsukawa; Yongxun Liu; Meishoku Masahara (IEICE Trans. Electron., 2013)

Analytical Thermal Model for Self-Heating in Advanced FinFET Devices With Implications for Design and Reliability. - Chuan Xu; Seshadri K. Kolluri; Kazuhiko Endo; Kaustav Banerjee (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013)

Variation behavior of tunnel-FETs originated from dopant concentration at source region and channel edge configuration. - Shinji Migita; Takashi Matsukawa; Takahiro Mori; Koichi Fukuda; Yukinori Morita; Wataru Mizubayashi; Kazuhiko Endo; Yongxun Liu; Shin-ichi O'Uchi; Meishoku Masahara; Hiroyuki Ota (ESSDERC, 2014)

Improvement of epitaxial channel quality on heavily arsenic- and boron-doped Si surfaces and impact on tunnel FET performance. - Yukinori Morita; Takahiro Mori; Shinji Migita; Wataru Mizubayashi; Koichi Fukuda; Takashi Matsukawa; Kazuhiko Endo; Shin-ichi O'Uchi; Yongxun Liu; Meishoku Masahara; Hiroyuki Ota (ESSDERC, 2014)

PBTI for N-type tunnel FinFETs. - Wataru Mizubayashi; Takahiro Mori; Koichi Fukuda; Yongxun Liu; Takashi Matsukawa; Yuki Ishikawa; Kazuhiko Endo; Shin-ichi O'Uchi; Junichi Tsukada; Hiromi Yamauchi; Yukinori Morita; Shinji Migita; et al. (ICICDT, 2015)

Advanced FinFET technologies for boosting SRAM performance. - Kazuhiko Endo (ASICON, 2017)

Post-Si Nano Device Technology. - Kazuhiko Endo (ASICON, 2019)

Analysis of charge-to-hot-carrier degradation in Ge pFinFETs. - Wataru Mizubayashi; Hiroshi Oka; Koichi Fukuda; Yuki Ishikawa; Kazuhiko Endo (IRPS, 2020)

Correction to "Analytical Thermal Model for Self-Heating in Advanced FinFET Devices With Implications for Design and Reliability". - Chuan Xu; Seshadri K. Kolluri; Kazuhiko Endo; Kaustav Banerjee (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)