A new test and characterization scheme for 10+ GHz low jitter wide band PLL. - Kazuhiko Miki; David Boerstler; Eskinder Hailu; Jieming Qi; Sarah Pettengill; Yuichi Goto (ASP-DAC, 2006)

A Circuit for Reducing Large Transient Current Effects on Processor Power Grids. - Eskinder Hailu; David W. Boerstler; Kazuhiko Miki; Jieming Qi; Michael Wang 001; Mack W. Riley (ISSCC, 2006)